M16C6NK Datasheet, PDF (139/404 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

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M16C/6N Group (M16C/6NK, M16C/6NM)
13. Timers
Timer Ai Mode Register (i = 0 to 4)
(When not using two-phase pulse signal processing)
b7 b6 b5 b4 b3 b2 b1 b0
0
01
Symbol
TA0MR to TA4MR
Address
After Reset
0396h to 039Ah
00h
Bit Symbol
Bit Name
Function
RW
TMOD0
TMOD1
MR0
Operation Mode Select Bit
Pulse Output Function
Select Bit
b1 b0
RW
0 1 : Event counter mode ⁽¹⁾
RW
0 : Pulse is not output
(TAiOUT pin functions as I/O port)
1 : Pulse is output
RW
(TAiOUT pin functions as pulse output pin)
MR1
Count Polarity Select Bit ⁽²⁾
0 : Counts falling edge of external signal
1 : Counts rising edge of external signal
RW
MR2
Up/Down Switching
Cause Select Bit
0 : UDF register
1 : Input signal to TAiOUT pin ⁽³⁾
RW
MR3 Set to "0" in event counter mode
RW
TCK0
Count Operation Type
Select Bit
0 : Reload type
1 : Free-run type
RW
TCK1 Can be "0" or "1" when not using two-phase pulse signal processing. RW
NOTES:
1.During event counter mode, the count source can be selected using the ONSF and TRGSR registers.
2.Effective when the TAiTGH and TAiTGL bits in the ONSF or TRGSR register are "00b" (TAiIN pin input).
3.Count down when input on TAiOUT pin is low or count up when input on that pin is high. The port direction
bit for TAiOUT pin is set to "0" (input mode).
Figure 13.8 TA0MR to TA4MR Registers in Event Counter Mode (when not using two-phase pulse
signal processing)
Rev.2.00 Nov 28, 2005 page 121 of 378
REJ09B0124-0200