M16C6NK Datasheet, PDF (153/404 Pages) Renesas Technology Corp – 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/60 SERIES

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M16C/6N Group (M16C/6NK, M16C/6NM)
13. Timers
13.2.3 Pulse Period and Pulse Width Measurement Mode
In pulse period and pulse width measurement mode, the timer measures pulse period or pulse width of an
external signal. Table 13.8 lists specifications in pulse period and pulse width measurement mode. Figure
13.20 shows TBiMR register in pulse period and pulse width measurement mode. Figure 13.21 shows the
operation timing when measuring a pulse period. Figure 13.22 shows the operation timing when measur-
ing a pulse width.
Table 13.8 Specifications in Pulse Period and Pulse Width Measurement Mode
Item
Specification
Count Source
f1, f2, f8, f32, fC32
Count Operation
• Up-count
• Counter value is transferred to reload register at an effective edge of
Count Start Condition
measurement pulse. The counter value is set to “0000h” to continue counting.
Set the TBiS bit ⁽¹⁾ to “1” (start counting)
Count Stop Condition
Set the TBiS bit to “0” (stop counting)
Interrupt Request Generation Timing • When an effective edge of measurement pulse is input ⁽²⁾
• Timer overflow. When an overflow occurs, the MR3 bit in the TBiMR
register is set to “1” (overflow) simultaneously. The MR3 bit is set to “0”
(no overflow) by writing to the TBiMR register at the next count timing or
later after the MR3 bit was set to “1”. At this time, make sure the TBiS bit
is set to “1” (start counting).
TBiIN Pin Function
Measurement pulse input
Read from Timer
Contents of the reload register (measurement result) can be read by reading
TBi register ⁽³⁾
Write to Timer
Value written to the TBi register is written to neither reload register nor counter
i = 0 to 5
NOTES:
1.The TB0S to TB2S bits are assigned to the bit 5 to bit 7 in the TABSR register, and the TB3S to TB5S
bits are assigned to the bit 5 to bit 7 in the TBSR register.
2. Interrupt request is not generated when the first effective edge is input after the timer started counting.
3. Value read from the TBi register is indeterminate until the second valid edge is input after the timer
starts counting.
Rev.2.00 Nov 28, 2005 page 135 of 378
REJ09B0124-0200