450NX Datasheet, PDF (69/248 Pages) Intel Corporation – Intel 450NX PCIset

3.4 PXB Configuration Space
3.4.12 IOABASE: I/O APIC Base Address
Address Offset: 68-69h
Default Value: 0FECh
Size:
16 bits
Attribute: Read/Write
This register defines the base address of the 1MB I/O APIC Space address range. IOABASE
applies to both host-initiated transactions and PCI-initiated inbound transactions, and is
therefore duplicated in both the MIOC and PXB Configuration Spaces. Software must ensure
that both sets are programmed identically to achieve correct functioning. See the MIOC
Configuration Space for a detailed description.
3.4.13 ISA: ISA Space
Address Offset: 7Ch
Default Value: 00h
Size:
8 bits
Attribute: Read/Write
This register defines the ISA Space address range. The register applies to both host-initiated
transactions and PCI-initiated inbound transactions, and is therefore duplicated in both the
MIOC and PXB Configuration Spaces. Software must ensure that both sets are programmed
identically to achieve correct functioning. See the MIOC Configuration Space for a detailed
description.
3.4.14 LXGB: Low Expansion Gap Base
Address Offset: 54-55h
Default Value: 0000h
Size:
16 bits
Attribute: Read/Write
This register defines the starting address of the Low Expansion Gap (LXG). LXGB register
applies to both host-initiated transactions and PCI-initiated inbound transactions, and is
therefore duplicated in both the MIOC and PXB Configuration Spaces. Software must ensure
that both sets are programmed identically to achieve correct functioning. See the MIOC
Configuration Space for a detailed description.
3.4.15 LXGT: Low Expansion Gap Top
Address Offset: 56-57h
Default Value: 0000h
Size:
16 bits
Attribute: Read/Write
LXGT defines the highest address of the Low Expansion Gap (LXG), above. This register
applies to both host-initiated transactions and PCI-initiated inbound transactions, and is
therefore duplicated in both the MIOC and PXB Configuration Spaces. Software must ensure
that both sets are programmed identically to achieve correct functioning. See the MIOC
Configuration Space for a detailed description.
Intel® 450NX PCIset
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