450NX Datasheet, PDF (34/248 Pages) Intel Corporation – Intel 450NX PCIset

3. Register Descriptions
Bits Description
31
Configuration Enable (CFGE).
When this bit is set to 1 accesses to PCI configuration space are enabled. If this bit is
reset to 0 accesses to PCI configuration space are disabled.
30:24 reserved (0)
23:16
Bus Number.
The Bus Number field selects which PCI bus should receive the configuration cycle.
The system bus and the compatibility PCI bus (PCI Bus 0A) are both accessed using
Bus Number 0; which bus is accessed depends on the Device Number.
15:11
Device Number.
This field selects one agent on the PCI bus selected by the Bus Number. On Bus
Number 0, Device Numbers 0-15 are on the compatibility PCI bus (PCI Bus 0A), while
Device Numbers 16-31 refer to devices on the system bus, including the Intel 450NX
PCIset itself and any Third Party Agents which use this configuration mechanism.
No. Device No. Device No. Device No.
Device
10h MIOC
14h PXB 1, Bus a 18h reserved 1Ch Third Party Agent
11h reserved
15h PXB 1, Bus b 19h reserved 1Dh Third Party Agent
12h PXB 0, Bus a 16h reserved
1Ah reserved 1Eh Third Party Agent
13h PXB 0, Bus b 17h reserved
1Bh reserved 1Fh n/a
10:8 Function Number.
The 450NX PCIset devices are not multi-function devices, and therefore this field
should always be "0" when accessing them.
7:2 Register Number.
This field selects one register within a particular Bus, Device, and Function as
specified by the other fields in the Configuration Address Register.
1:0 reserved (0)
3.2.2
CONFIG_DATA: Configuration Data Register
I/O Address: CFCh
Default Value: 00000000h
Size:
32 bits
Attribute: Read/Write
The portion of configuration space that is referenced by CONFIG_DATA is determined by the
contents of CONFIG_ADDRESS.
Bits Description
31:0 Configuration Data Window (CDW).
If bit 31 of CONFIG_ADDRESS is 1 any I/O reference that falls in the CONFIG_DATA
I/O space will be mapped to configuration space using the contents of
CONFIG_ADDRESS.
3-2
Intel® 450NX PCIset