450NX Datasheet, PDF (122/248 Pages) Intel Corporation – Intel 450NX PCIset

11. Clocking and Reset
11.2.2.2 PXB Reset State
PCI Bus Interface (2 per PXB: A,B)
P(A,B)AD[31:0]
Tristate
P(A,B)PAR
P(A,B)C/BE[3:0]#
Tristate
P(A,B)PERR#
P(A,B)CLKFB
-
P(A,B)REQ[5:0]#
P(A,B)CLK
Toggling P(A,B)RST#
P(A,B)DEVSEL#
Tristate
P(A,B)SERR#
P(A,B)FRAME#
Tristate
P(A,B)STOP#
P(A,B)GNT[5:0]#
Tristate
P(A,B)TRDY#
P(A,B)IRDY#
Tristate
P(A,B)XARB#
P(A,B)LOCK#
Tristate
PCI Bus Interface / Non-Duplicated (one set per PXB)
ACK64#
Tristate
PHLDA#
MODE64#
Strapped REQ64#
PHOLD#
-
WSC#
Expander Interface (one per PXB)
XADS#
Tristate
XHSTBP#
XBE[1:0]#
Tristate
XIB
XBLK#
-
XPAR#
XCLK
Toggling XRST#
XD[15:0]#
Tristate
XXRTS#
XHRTS#
-
XXSTBN#
XHSTBN#
-
XXSTBP#
Common Support Signals
CRES[1:0]
Strapped TMS
TCK
-
TRST#
TDI
-
VCCA (3)
TDO
OD
VREF (2)
Component-Specific Support Signals
INTRQ(A,B)#
Deasserted PIIXOK#
LONGXB#
Strapped PWRGD
P(A,B)MON[1:0]#
Tristate
Tristate
Tristate
- (see note)
Asserted
Open
Tristate
Tristate
Strapped
Tristate
Asserted
Tristate
-
Deasserted
Tristate
Asserted
Deasserted
Deasserted
Deasserted
-
-
Reference
Reference
-
-
Note:
The P(A,B)REQ[5:0]# signals are inputs to the PXB. During reset, these inputs are ignored. However,
these signals become "live" immediately following reset desassertion. All unconnected REQ# inputs
should be strapped deasserted. All connected REQ# inputs should have weak pullups.
11-8
Intel® 450NX PCIset