450NX Datasheet, PDF (51/248 Pages) Intel Corporation – Intel 450NX PCIset

3.3 MIOC Configuration Space
3.3.26 MAR[6:0]: Memory Attribute Region Registers
Address Offset: 61-67h
Default Value: 03h for MAR[0]
00h for all others
Size:
8 bits each
Attribute: Read/Write
Seven Memory Attribute Region (MAR) registers are used to program memory attributes of
various sizes in the 640 Kbyte-1 MByte address range. Each MAR register controls two
segments, typically 16 Kbyte in size. Each of these segments has an identical 4-bit field which
specifies the memory attributes for the segment, and apply to both host-initiated accesses and
PCI-initiated accesses to the segment.
Bits Description
7:6 reserved (0)
5
Segment 1, Write Enable (WE).
When cleared, host-initiated write accesses are directed to the compatibility PCI bus.
When set, write accesses are handled normally according to the outbound access
disposition.
4
Segment 1, Read Enable (RE).
When cleared, host-initiated read accesses are directed to the compatibility PCI bus.
When set, read accesses are handled normally according to the
outbound access disposition.
3:2 reserved (0)
1
Segment 0, Write Enable (WE).
Identical to segment 1 WE, above.
0
Segment 0, Read Enable (RE).
Identical to segment 1 RE, above.
Table 3-2 summarizes the possible outcomes of the various Read Enable (RE) and Write
Enable (WE) combinations:
Table 3-2: MAR-controlled Access Disposition
WE,
Outbound
RE
Write
Read
Outbound locked
Write
Read
Inbound
Write
Read
00 PCI 0a
PCI 0a
PCI 0a
PCI 0a
unclaimed unclaimed
01 PCI 0a
Memory¹ PCI 0a
PCI 0a
unclaimed Memory²
10
Memory¹ PCI 0a
PCI 0a
PCI 0a
Memory² unclaimed
11
Memory¹ Memory¹ Memory¹ Memory¹ Memory² Memory²
1. Normally, the access will be directed to the DRAM. However, if this MAR region is overlapped by
an enabled expansion gap, the access will instead be left unclaimed on the system bus. A third-
party agent may then claim the access.
2. Normally, the access will be directed to the DRAM. However, if this MAR region is overlapped by
an enabled expansion gap, the access will instead be directed up to the system bus. A third-party
agent may then claim the access.
Intel® 450NX PCIset
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