450NX Datasheet, PDF (22/248 Pages) Intel Corporation – Intel 450NX PCIset

2. Signal Descriptions
PpTRDY#
PpSERR#
PpSTOP#
Target Ready
PCI I/O
The assertion of TRDY# indicates the target agent's ability to complete the
current data phase of the transaction. TRDY# is an input when the PXB acts as
a PCI master and an output when the PXB acts as a PCI target.
System Error
The PXB asserts this signal to indicate an error condition.
PCI OD
Stop
PCI I/O
STOP# is used for disconnect, retry, and abort sequences on the PCI Bus. It is
an input when the PXB acts as a PCI initiator and an output when the PXB
acts as a PCI target.
2.4.2
64-bit Access Support
These signals are used only in 64-bit bus mode. There is one set per PXB.
ACK64#
64-bit Access Acknowledge
PCI I/O
This signal is driven by the accessed target to indicate its willingness to
transfer 64-bit data. When the PXB is the bus target, this signal is an output.
If asserted, the PXB will transfer 64-bit data; otherwise, the PXB will transfer
32-bit data. When the PXB is the bus master, this signal is an input.
MODE64#
64-bit Bus Mode
PCI I
A strapping pin that selects whether the pair of 32-bit PCI buses are used as
two independent 32-bit buses, or linked together as a single 64-bit bus. If
asserted, the buses are used as a single 64-bit bus: the 32-bit data bus of the
PCI “B” port becomes the high Dword of the 64-bit bus. An internal pull-up
insures that the pin appears deasserted if left unconnected.
REQ64#
64-bit Access Request
PCI I/O
This signal is driven by the bus master to indicate it’s desire to transfer 64-bit
data. When the PXB is the bus master, this signal is an output. The PXB will
assert this signal if it can transfer 64-bit data. When the PXB is the bus target,
this signal is an input.
The following 64-bit extension signals are mapped from the existing “B” port signals:
AD[63:32] from PBAD[31:0]
C/BE[7:4] from PBC/BE[3:0]
PAR64 from PBPAR
All other controls and status signals in 64-bit operation are taken from the Bus “A” signal set.
Unused pins on the “B” side should be tied inactive.
2.4.3
Internal vs. External Arbitration
Each PXB supports both internal arbitration and external arbitration, independently for each
PCI bus. While in internal arbitration mode, six pairs of request/grant signals are used to
support up to six PCI masters on the bus (plus the PXB itself, and the PIIX4E south bridge on
2-10
Intel® 450NX PCIset