450NX Datasheet, PDF (33/248 Pages) Intel Corporation – Intel 450NX PCIset

Register Descriptions ₃
The Intel^® 450NX PCIset internal registers (both I/O Mapped and Configuration registers) are
accessible by the processor. Each MIOC, and each PCI bus in each PXB has an independent
configuration space. This chapter provides detailed descriptions of each register.
3.1
Access Restrictions
Register Attributes
Read Only Writes to this register have no effect.
Read/Write
Data may be read from and written to this register. Selected bits in the
register may be designated as "read-only"; such bits are not affected by data
writes to the register.
Read/Clear Data may be read from the register. A data write operates strictly as a clear:
Sticky
Data in this register remains valid and unchanged, during and following any
reset except the power-good reset.
3.2
I/O Mapped Registers
The Intel^® 450NX PCIset contains two registers that reside in the processor I/O address space:
the Configuration Address (CONFIG_ADDRESS) Register and the Configuration Data
(CONFIG_DATA) Register. The Configuration Address Register enables/disables the
configuration space and determines what portion of configuration space is visible through the
Configuration Data window.
3.2.1
CONFIG_ADDRESS: Configuration Address Register
I/O Address: CF8h [Dword]
Default Value: 00000000h
Size:
32 bits
Attribute: Read/Write
The CONFIG_ADDRESS register contains the Bus Number, Device Number, Function
Number, and Register Number for which a subsequent configuration access is intended.
Intel® 450NX PCIset
3-1