450NX Datasheet, PDF (142/248 Pages) Intel Corporation – Intel 450NX PCIset

12. Electrical Characteristics
Notes:
1.
2.
3.
4.
Relative to HCLKIN Rising edge.
Strobe timings are generated from an internal clock which is a multiple of HCLKIN. This enables the
strobes to track system timings staying centered within the data window. Numbers given are for 100 MHz
operation. Timings for other frequencies can be calculated by Strobe_Min_Time = [-0.15 +
(1/Bus_Freq)1/ 4] ns and Strobe_Max_Time = [2.65 + (1/Bus_Freq)1 /4] ns.
Strobe timings are generated from an internal clock which is a multiple of HCLKIN. This enables the
strobes to track system timings staying centered within the data window. Numbers given are for 100 MHz
operation. Timings for other frequencies can be calculated by Strobe_Min_Time = [-0.15 +
(1/Bus_Freq)3/4] ns and Strobe_Max_Time = [2.65 + (1/Bus_Freq)3/4] ns.
Min and Max timings are measured with 0pF and 25 Ω to Vtt (1.5 V).
Table 12-17: Source Synchronous Signal to Strobe Timings (at source)
Symbol Parameter
Setup
Min
Setup
Max
Hold
Min
Hold
Max
Notes
T80
MD(71:0)#,
2.0
2.75
X(0,1)D[15:0]#,
X(0,1)ADS#,
X(0,1)BE[1:0]#,
X(0,1)BLK#,
X(0,1)PAR#
T81
MD(71:0)#,
X(0,1)D[15:0]#,
X(0,1)ADS#,
X(0,1)BE[1:0]#,
X(0,1)BLK#,
X(0,1)PAR#
1-5
2.0
2.75
1-5
Notes:
1.
2.
3.
4.
5.
MD(71:0)# strobes are single-ended, and the falling edge of the strobe is used to capture data;
Expander strobes are differential.
Values are guaranteed by design.
Setup Max and Hold Max are specified at frequency= 100 MHz.
Timings for other frequencies can be calculated as follows: T80 Setup_Max = [(1/Bus_Freq)1/4 + .250]
ns, T81 Hold_Max = [(1/Bus_Freq)1/4 + .250 ] ns, where .250ns represents the error margin around
strobe placement.
Data delay times relative to HCLK for any bus frequency can be calculated as follows... For First Data:
Data_Min_Time = [-0.15 ]ns and Data_Max_Time = [2.65 ]ns; For Second Data: Data_Min_Time = [-0.15
+ (1/Bus Freq)/2 ]ns and Data_Max_Time = [2.65 + (1/Bus Freq)/2 ]ns.
12-18
Intel® 450NX PCIset