MC912DG128ACPVE Datasheet, PDF (89/478 Pages) Freescale Semiconductor, Inc – Upward compatible with M68HC11 instruction set

Freescale Semiconductor, Inc.
Resource Mapping
Internal Resource Mapping
6.3.1 Register Block Mapping
After reset the 1K byte register block resides at location $0000 but can
be reassigned to any 2K byte boundary within the standard 64K byte
address space. Mapping of internal registers is controlled by five bits in
the INITRG register. The register block occupies the first 1K byte of the
2K byte block.
INITRG — Initialization of Internal Register Position Register
Bit 7
6
5
4
3
2
REG15 REG14 REG13 REG12 REG11
0
RESET:
0
0
0
0
0
0
$0011
1
Bit 0
0
MMSWAI
0
0
REG[15:11] — Internal register map position
These bits specify the upper five bits of the 16-bit registers address.
Normal modes: write once; special modes: write anytime. Read
anytime.
MMSWAI — Memory Mapping Interface Stop in Wait Control
This bit controls access to the memory mapping interface when in
Wait mode.
Normal modes: write anytime; special modes: write never. Read
anytime.
0 = Memory mapping interface continues to function during Wait
mode.
1 = Memory mapping interface access is shut down during Wait
mode.
MC68HC912DT128A — Rev 4.0
MOTOROLA
Resource Mapping
For More Information On This Product,
Go to: www.freescale.com
Technical Data
89