MC912DG128ACPVE Datasheet, PDF (330/478 Pages) Freescale Semiconductor, Inc – Upward compatible with M68HC11 instruction set

Freescale Semiconductor, Inc.
MSCAN Controller
msCAN12
RxBG
RxFG
RXF
CPU bus
Tx0
TXE
PRIO
Tx1
TXE
PRIO
Tx2
TXE
PRIO
Figure 18-2. User Model for Message Buffer Organization
18.4.3 Transmit Structures
The msCAN12 has a triple transmit buffer scheme in order to allow
multiple messages to be set up in advance and to achieve an optimized
real-time performance. The three buffers are arranged as shown in
Figure 18-2.
All three buffers have a 13 byte data structure similar to the outline of the
receive buffers (see Programmer’s Model of Message Storage). An
additional transmit buffer priority register (TBPR) contains an 8-bit so
Technical Data
330
MC68HC912DT128A — Rev 4.0
MSCAN Controller
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