MC912DG128ACPVE Datasheet, PDF (429/478 Pages) Freescale Semiconductor, Inc – Upward compatible with M68HC11 instruction set

Freescale Semiconductor, Inc.
Electrical Specifications
Tables of Data
Table 21-12. Control Timing
Characteristic
Symbol
Frequency of operation
E-clock period
External oscillator frequency
Processor control setup time
t_PCSU = t_cyc/2+ 30
f_o
t_cyc
f_eo
t_PCSU
Reset input pulse width
To guarantee external reset vector
Minimum input time (can be preempted by internal reset)
PW_RSTL
Mode programming setup time
Mode programming hold time
Interrupt pulse width, IRQ edge-sensitive mode
PW_IRQ = 2t_cyc + 20
Wait recovery startup time
Timer input capture pulse width
t_MPS
t_MPH
PW_IRQ
t_WRS
PW_TIM
1. When using a resonator (quartz or ceramic), see Table 21-17 for allowable values.
8.0 MHz
Min Max
0.004 8.0
0.125 250
0.5 _16.0⁽¹⁾
92
—
Unit
MHz
µs
MHz
ns
32
—
t_cyc
2
—
t_cyc
4
—
t_cyc
20
—
ns
270 —
ns
—
4 cycles
270 —
ns
NOTE:
RESET is recognized during the first clock cycle it is held low. Internal
circuitry then drives the pin low for 16 clock cycles, releases the pin, and
samples the pin level 9 cycles later to determine the source of the
interrupt.
PT[7:0]¹
PT[7:0]²
PW_TIM
PT7¹
PT7²
PW_PA
NOTES:
1. Rising edge sensitive input
2. Falling edge sensitive input
Figure 21-1. Timer Inputs
MC68HC912DT128A — Rev 4.0
MOTOROLA
Electrical Specifications
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Technical Data
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