MC912DG128ACPVE Datasheet, PDF (296/478 Pages) Freescale Semiconductor, Inc – Upward compatible with M68HC11 instruction set

Freescale Semiconductor, Inc.
Multiple Serial Interface
SP0CR2 — SPI Control Register 2
Bit 7
6
5
0
0
0
RESET:
0
0
0
$00D1
4
3
2
1
Bit 0
0
PUPS
RDPS
SSWAI
SPC0
0
1
0
0
0
Read or write anytime.
PUPS — Pull-Up Port S Enable
0 = No internal pull-ups on port S
1 = All port S input pins have an active pull-up device. If a pin is
programmed as output, the pull-up device becomes inactive
RDPS — Reduce Drive of Port S
0 = Port S output drivers operate normally
1 = All port S output pins have reduced drive capability for lower
power and less noise
SSWAI — Serial Interface Stop in WAIT mode
0 = Serial interface clock operates normally
1 = Halt serial interface clock generation in WAIT mode
SPC0 — Serial Pin Control 0
This bit decides serial pin configurations with MSTR control bit.
Pin Mode
SPC0^{(1) MSTR} MISO⁽²⁾ MOSI⁽³⁾ SCK⁽⁴⁾
#1
Normal
0
#2
0 Slave Out Slave In SCK In
1
Master In
Master
Out
SCK Out
#3
Bidirectional 1
#4
0 Slave I/O GPI/O SCK In
1
GPI/O Master I/O SCK Out
1. The serial pin control 0 bit enables bidirectional configurations.
2. Slave output is enabled if DDRS4 = 1, SS = 0 and MSTR = 0. (#1, #3)
3. Master output is enabled if DDRS5 = 1 and MSTR = 1. (#2, #4)
4. SCK output is enabled if DDRS6 = 1 and MSTR = 1. (#2, #4)
5. SS output is enabled if DDRS7 = 1, SSOE = 1 and MSTR = 1. (#2, #4)
SS⁽⁵⁾
SS In
SS I/O
SS In
SS I/O
Technical Data
296
MC68HC912DT128A — Rev 4.0
Multiple Serial Interface
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