MC912DG128ACPVE Datasheet, PDF (244/478 Pages) Freescale Semiconductor, Inc – Upward compatible with M68HC11 instruction set

Freescale Semiconductor, Inc.
Enhanced Capture Timer
M clock
PT0
PT1
PT2
PT3
PT4
PT5
PT6
÷1, 2, ..., 128
Prescaler
16-bit Free-running
16 BIT MmAIaNinTtIiMmEerR
M clock
÷ 1, 4, 8, 16
Prescaler
Pin logic
Delay counter _EDG0
Comparator
TC0 capture/compare register
16-bit load register
16-bit modulus
down counter
0 ^RESET
PAC0
Pin logic
TC0H hold register
Delay counter _EDG1
Comparator
TC1 capture/compare register
PA0H hold register
0 ^RESET
PAC1
Pin logic
TC1H hold register
Delay counter _EDG2
Comparator
TC2 capture/compare register
PA1H hold register
0 ^RESET
PAC2
Pin logic
TC2H hold register
Delay counter _EDG3
Comparator
TC3 capture/compare register
PA2H hold register
0 ^RESET
PAC3
TC3H hold register
PA3H hold register
Pin logic _EDG4
EDG0
MUX
Comparator
TC4 capture/compare register
LATQ, BUFEN
(queue mode)
Pin logic _EDG5
EDG1
MUX
Pin logic _EDG6
EDG2
MUX
Comparator
TC5 capture/compare register
Read TC3H
hold register
Comparator
TC6 capture/compare register
Read TC2H
hold register
Read TC1H
hold register
PT7
Pin logic _EDG7
EDG3
MUX
Comparator
TC7 capture/compare register
Read TC0H
hold register
Figure 15-2. Timer Block Diagram in Queue Mode
Technical Data
244
MC68HC912DT128A — Rev 4.0
Enhanced Capture Timer
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