MC912DG128ACPVE Datasheet, PDF (239/478 Pages) Freescale Semiconductor, Inc – Upward compatible with M68HC11 instruction set

Freescale Semiconductor, Inc.
Pulse Width Modulator
PWM Register Descriptions
PORTP — Port P Data Register
Bit 7
6
5
PP7
PP6
PP5
PWM
–
–
–
RESET:
–
–
–
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4
3
2
1
Bit 0
PP4
PP3
PP2
PP1
PP0
–
PWM3
PWM2
PWM1
PWM0
–
–
–
–
–
PORTP can be read anytime.
PWM functions share port P pins 3 to 0 and take precedence over the
general-purpose port when enabled.
When configured as input, a read will return the pin level. For port bits 7
to 4 it will read zero because there are no available external pins.
When configured as output, a read will return the latched output data.
For port bits 7 to 4 it will read the last value written. A write will drive
associated pins only if configured for output and the corresponding PWM
channel is not enabled.
After reset, all pins are general-purpose, high-impedance inputs.
DDRP — Port P Data Direction Register
Bit 7
6
5
DDP7
DDP6
DDP5
RESET:
0
0
0
4
DDP4
0
3
DDP3
0
2
DDP2
0
1
DDP1
0
Bit 0
DDP0
0
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DDRP determines pin direction of port P when used for general-purpose
I/O.
DDRP[7:4] — This bits served as memory locations since there are no
corresponding port pins.
DDRP[3:0] — Data Direction Port P pin 0-3
0 = I/O pin configured as high impedance input
1 = I/O pin configured for output.
MC68HC912DT128A — Rev 4.0
MOTOROLA
Pulse Width Modulator
For More Information On This Product,
Go to: www.freescale.com
Technical Data
239