MC912DG128ACPVE Datasheet, PDF (452/478 Pages) Freescale Semiconductor, Inc – Upward compatible with M68HC11 instruction set

Freescale Semiconductor, Inc.
Appendix: CGM Practical Aspects
Table 23-2. Suggested 8MHz Synthesis PLL Filter Elements (Acquisition Mode)
Reference [MHz]
0.614
0.614
0.614
0.614
0.8
0.8
0.8
0.8
1
1
1
1
1.6
1.6
1.6
1.6
2
2
2
2
2.66
2.66
2.66
2.66
4
4
4
4
SYNR
$0C
$0C
$0C
$0C
$09
$09
$09
$09
$07
$07
$07
$07
$05
$05
$05
$05
$03
$03
$03
$03
$02
$02
$02
$02
$01
$01
$01
$01
Fbus [MHz]
7.98
7.98
7.98
7.98
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
8.00
C [nF]
1000
47
10
3.3
2200
100
22
4.7
2200
100
2.
4.7
3300
100
33
10
4700
220
47
10
2200
220
47
10
2200
330
100
22
R [kΩ]
0.43
2
4.3
7.5
0.27
1.2
2.4
5.6
0.22
1
2.2
4.7
0.15
0.82
1.5
2.7
0.1
0.51
1
2.4
0.12
0.43
1
2
0.1
0.27
0.51
1
Loop Bandwidth
[kHz]
1.2
5.5
12
21
0.9
4.4
9.3
20.1
1
4.8
10.4
22.5
1.1
6.2
10.7
19.5
1
4.6
10
21.8
1.7
5.3
11.6
25.1
2.1
5.4
9.7
20.8
Bandwidth
Limit [kHz]
157
157
157
157
201
201
201
201
251
251
251
251
402
402
402
402
502
502
502
502
668
668
668
668
1005
1005
1005
1005
Technical Data
452
MC68HC912DT128A — Rev 4.0
Appendix: CGM Practical Aspects
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