MC912DG128ACPVE Datasheet, PDF (82/478 Pages) Freescale Semiconductor, Inc – Upward compatible with M68HC11 instruction set

Operating Modes
Freescale Semiconductor, Inc.
while the MCU is in special peripheral mode as internal bus
conflicts between BDM and the external master can cause
improper operation of both functions.
Bit 7
6
SMODN MODB
RESET:
0
0
RESET:
0
0
RESET:
0
1
RESET:
0
1
RESET:
1
0
RESET:
1
0
RESET:
1
1
MODE — Mode Register
5
MODA
0
1
0
1
0
1
1
4
ESTR
1
1
1
1
1
1
1
3
2
1
IVIS EBSWAI EMK
1
0
1
1
0
1
1
0
1
1
0
1
0
0
0
0
0
0
0
0
0
Bit 0
EME
1
1
1
1
0
0
0
Special Single Chip
Special Exp Nar
Peripheral
Special Exp Wide
Normal Single Chip
Normal Exp Nar
Normal Exp Wide
$000B
The MODE register controls the MCU operating mode and various
configuration options. This register is not in the map in peripheral mode
SMODN, MODB, MODA — Mode Select Special, B and A
These bits show the current operating mode and reflect the status of
the BKGD, MODB and MODA input pins at the rising edge of reset.
Read anytime.
SMODN may only be written if SMODN = 0 (in special modes) but the
first write is ignored.
MODB, MODA may be written once if SMODN = 1; anytime if SMODN
= 0 but the first write is ignored and in special peripheral and reserved
modes cannot be selected.
Technical Data
82
MC68HC912DT128A — Rev 4.0
Operating Modes
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