MC912DG128ACPVE Datasheet, PDF (131/478 Pages) Freescale Semiconductor, Inc – Upward compatible with M68HC11 instruction set

Freescale Semiconductor, Inc.
EEPROM Memory
EEPROM Control Registers
.
EEPROG — EEPROM Control
Bit 7
6
BULKP
0
RESET:
1
0
5
AUTO
0
4
BYTE
0
3
ROW
0
2
ERASE
0
1
EELAT
0
Bit 0
EEPGM
0
$00F3
BULKP — Bulk Erase Protection
0 = EEPROM can be bulk erased.
1 = EEPROM is protected from being bulk or row erased.
Read anytime. Write anytime if EEPGM = 0 and PROTLCK = 0.
AUTO — Automatic shutdown of program/erase operation.
EEPGM is cleared automatically after the program/erase cycles are
finished when AUTO is set.
0 = Automatic clear of EEPGM is disabled.
1 = Automatic clear of EEPGM is enabled.
Read anytime. Write anytime if EEPGM = 0.
BYTE — Byte and Aligned Word Erase
0 = Bulk or row erase is enabled.
1 = One byte or one aligned word erase only.
Read anytime. Write anytime if EEPGM = 0.
ROW — Row or Bulk Erase (when BYTE = 0)
0 = Erase entire EEPROM array.
1 = Erase only one 32-byte row.
Read anytime. Write anytime if EEPGM = 0.
BYTE and ROW have no effect when ERASE = 0
Table 9-3. Erase Selection
BYTE
0
0
1
1
ROW
0
1
0
1
Block size
Bulk erase entire EEPROM array
Row erase 32 bytes
Byte or aligned word erase
Byte or aligned word erase
If BYTE = 1 only the location specified by the address written to the
programming latches will be erased. The operation will be a byte or
an aligned word erase depending on the size of written data.
MC68HC912DT128A — Rev 4.0
MOTOROLA
EEPROM Memory
For More Information On This Product,
Go to: www.freescale.com
Technical Data
131