MC912DG128ACPVE Datasheet, PDF (348/478 Pages) Freescale Semiconductor, Inc – Upward compatible with M68HC11 instruction set

Freescale Semiconductor, Inc.
MSCAN Controller
Figure 18-13. Standard Identifier Mapping
ADDR⁽¹⁾
$01x0
$01x1
$01x2
$01x3
REGISTER
IDR0
IDR1
IDR2
IDR3
R/W BIT 7
6
R
ID10
ID9
W
R
ID2
ID1
W
R
W
R
W
5
4
3
2
ID8
ID7
ID6
ID5
ID0
RTR IDE(0)
1. x is 4, 5, 6, or 7 depending on which buffer RxFG, Tx0, Tx1, or Tx2 respectively.
1
BIT 0
ID4
ID3
18.12.2 Identifier Registers (IDRn)
The identifiers consist of either 11 bits (ID10–ID0) for the standard, or 29
bits (ID28–ID0) for the extended format. ID10/28 is the most significant
bit and is transmitted first on the bus during the arbitration procedure.
The priority of an identifier is defined to be highest for the smallest binary
number.
SRR — Substitute Remote Request
This fixed recessive bit is used only in extended format. It must be set
to 1 by the user for transmission buffers and will be stored as received
on the CAN bus for receive buffers.
IDE — ID Extended
This flag indicates whether the extended or standard identifier format
is applied in this buffer. In case of a receive buffer the flag is set as
being received and indicates to the CPU how to process the buffer
identifier registers. In case of a transmit buffer the flag indicates to the
msCAN12 what type of identifier to send.
0 = Standard format (11-bit)
1 = Extended format (29-bit)
Technical Data
348
MC68HC912DT128A — Rev 4.0
MSCAN Controller
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