MC912DG128ACPVE Datasheet, PDF (440/478 Pages) Freescale Semiconductor, Inc – Upward compatible with M68HC11 instruction set

Freescale Semiconductor, Inc.
Electrical Specifications
Table 21-16. CGM Characteristics
5.0 Volts +/- 10%
Characteristic
Symbol
Min.
Max.
Unit
PLL reference frequency
Bus frequency
VCO range
VCO Limp-Home frequency
Lock Detector transition from Acquisition to Tracking mode
Lock Detection
Un-Lock Detection
Lock Detector transition from Tracking to Acquisition mode
PLLON Stabilization delay⁽¹⁾
f_REF
f_BUS
f_VCO
f_VCOMIN
∆_trk
∆_Lock
∆_unl
∆_unt
0.5
0.004
2.5
0.5
3%
0%
0.5%
6%
8
8
8
2.5
4%
1.5%
2.5%
8%
MHz
MHz
MHz
MHz
—
—
—
—
PLLON Total Stabilization delay⁽²⁾
t_stab
PLLON Acquisition mode stabilization delay⁽³⁾
t_acq
PLLON Tracking mode stabilization delay⁽³⁾
t_al
3
ms
1
ms
2
ms
1. PLL stabilization delay is highly dependent on operational requirement and external component values (e.e. crystal, XFC
filter component values). Note (2) shows typical delay values for a typical configuration. Appropriate XFC filter values
should be chosen based on operational requirement of system.
2. f_REF = 4MHz, f_SYS = 8MHz (REFDV = #$00, SYNR = #$01), XFC: Cs = 33nF, Cp - 3.3nF, Rs = 2.7KΩ.
Table 21-17. Oscillator Characteristics
Input buffer hysteresis⁽¹⁾
Resonator Frequency⁽²⁾
(VDDPLL=VDD)
Resonator Frequency⁽²⁾
(VDDPLL=0V)
MC68HC912DT128A MC68HC912Dx128C MC68HC912Dx128P Unit
Min
0
Max
50
75
350
75
350
mV
Min
0.5
Max
8
0.5
8
0.5
8
MHz
Min
4
Max
10
4
10
0.5
16
MHz
1. These values are dervied from design simulation and are not tested
2. Specifications apply to quartz or ceramic resonators only
Table 21-18. STOP Key Wake-up Filter
Characteristic
STOP Key Wake-Up Filter time
STOP Key Wake-Up Filter pulse interval
Symbol
t_KWSTP
t_KWSP
Min.
2
20
Max.
10
-
Unit
µs
µs
Technical Data
440
MC68HC912DT128A — Rev 4.0
Electrical Specifications
For More Information On This Product,
Go to: www.freescale.com
MOTOROLA