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MC912DG128ACPVE Datasheet, PDF (80/478 Pages) Freescale Semiconductor, Inc – Upward compatible with M68HC11 instruction set
Operating Modes
Freescale Semiconductor, Inc.
BKGD
1
1
1
1
0
0
0
0
MODB
0
0
1
1
0
0
1
1
MODA
0
1
0
1
0
1
0
1
Table 5-1. Mode Selection
Mode
Normal Single Chip
Normal Expanded Narrow
Reserved (Forced to Peripheral)
Normal Expanded Wide
Special Single Chip
Special Expanded Narrow
Special Peripheral
Special Expanded Wide
Port A
G.P. I/O
ADDR/DATA
—
ADDR/DATA
G.P. I/O
ADDR/DATA
ADDR/DATA
ADDR/DATA
Port B
G.P. I/O
ADDR
—
ADDR/DATA
G.P. I/O
ADDR
ADDR/DATA
ADDR/DATA
There are two basic types of operating modes:
Normal modes — some registers and bits are protected
against accidental changes.
Special modes — allow greater access to protected control
registers and bits for special purposes such as testing and
emulation.
A system development and debug feature, background debug mode
(BDM), is available in all modes. In special single-chip mode, BDM is
active immediately after reset.
5.3.1 Normal Operating Modes
These modes provide three operating configurations. Background
debug is available in all three modes, but must first be enabled for some
operations by means of a BDM background command, then activated.
Normal Single-Chip Mode — There are no external address and
data buses in this mode. The MCU operates as a stand-alone
device and all program and data resources are on-chip. External
port pins normally associated with address and data buses can be
used for general-purpose I/O.
Normal Expanded Wide Mode — This is a normal mode of
operation in which the expanded bus is present with a 16-bit data
bus. Ports A and B are used for the 16-bit multiplexed
address/data bus.
Technical Data
80
MC68HC912DT128A — Rev 4.0
Operating Modes
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