MC912DG128ACPVE Datasheet, PDF (46/478 Pages) Freescale Semiconductor, Inc – Upward compatible with M68HC11 instruction set

Freescale Semiconductor, Inc.
Pinout and Signal Descriptions
3.3.5 V_DDPLL, V_SSPLL
Provides operating voltage and ground for the Phase-Locked Loop. This
allows the supply voltage to the PLL to be bypassed independently.
NOTE:
The VSSPLL pin should always be grounded even if the PLL is not used.
The VDDPLL pin should not be left floating. It is recommended to
connect the VDDPLL pin to ground if the PLL is not used.
3.3.6 XFC
PLL loop filter. Please see Appendix: CGM Practical Aspects for
information on how to calculate PLL loop filter elements. Any current
leakage on this pin must be avoided.
VDDPLL
C₀
MCU
R₀
C_a
XFC
Figure 3-4. PLL Loop FIlter Connections
Technical Data
46
MC68HC912DT128A — Rev 4.0
Pinout and Signal Descriptions
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