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MC912DG128ACPVE Datasheet, PDF (289/478 Pages) Freescale Semiconductor, Inc – Upward compatible with M68HC11 instruction set
Freescale Semiconductor, Inc.
Multiple Serial Interface
Serial Peripheral Interface (SPI)
R8 — Receive Bit 8
Read anytime. Write has no meaning or affect.
This bit is the ninth serial data bit received when the SCI system is
configured for nine-data-bit operation.
T8 — Transmit Bit 8
Read or write anytime.
This bit is the ninth serial data bit transmitted when the SCI system is
configured for nine-data-bit operation. When using 9-bit data format
this bit does not have to be written for each data word. The same
value will be transmitted as the ninth bit until this bit is rewritten.
R7/T7–R0/T0 — Receive/Transmit Data Bits 7 to 0
Reads access the eight bits of the read-only SCI receive data register
(RDR). Writes access the eight bits of the write-only SCI transmit data
register (TDR). SCxDRL:SCxDRH form the 9-bit data word for the
SCI. If the SCI is being used with a 7- or 8-bit data word, only SCxDRL
needs to be accessed. If a 9-bit format is used, the upper register
should be written first to ensure that it is transferred to the transmitter
shift register with the lower register.
16.5 Serial Peripheral Interface (SPI)
The serial peripheral interface allows the MC68HC912DT128A to
communicate synchronously with peripheral devices and other
microprocessors. The SPI system in the MC68HC912DT128A can
operate as a master or as a slave. The SPI is also capable of
interprocessor communications in a multiple master system.
When the SPI is enabled, all pins that are defined by the configuration
as inputs will be inputs regardless of the state of the DDRS bits for those
pins. All pins that are defined as SPI outputs will be outputs only if the
DDRS bits for those pins are set. Any SPI output whose corresponding
DDRS bit is cleared can be used as a general-purpose input.
A bidirectional serial pin is possible using the DDRS as the direction
control.
MC68HC912DT128A — Rev 4.0
MOTOROLA
Multiple Serial Interface
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Technical Data
289