MC912DG128ACPVE Datasheet, PDF (317/478 Pages) Freescale Semiconductor, Inc – Upward compatible with M68HC11 instruction set

Freescale Semiconductor, Inc.
Inter IC Bus
IIC Register Descriptions
IBPURD — Pull-Up and Reduced Drive for Port IB
$00E5
Bit 7
6
5
4
3
2
1
Bit 0
0
0
0
RDPIB
0
0
0
PUPIB
RESET:
0
0
0
0
0
0
0
0
Read and write anytime
RDPIB - Reduced Drive of Port IB
0 = All port IB output pins have full drive enabled.
1 = All port IB output pins have reduced drive capability.
PUPIB - Pull-Up Port IB Enable
0 = Port IB pull-ups are disabled.
1 = Enable pull-up devices for port IB input pins [7:6]. Pull-ups for
port IB input pins [5:0] are always enabled.
PORTIB — Port Data IB Register
IIC
RESET:
Bit 7
PIB7
SCL
-
6
PIB6
SDA
-
5
PIB5
-
-
4
PIB4
-
-
3
PIB3
-
-
2
PIB2
-
-
1
PIB1
-
-
Bit 0
PIB0
-
-
$00E6
Read and write anytime.
IIC functions SCL and SDA share port IB pins 7 and 6 and take
precedence over the general-purpose port when IIC is enabled. The
SCL and SDA output buffers behave as open-drain outputs.
When port is configured as input, a read will return the pin level. Port bits
5 through 0 have internal pull ups when configured as inputs so they will
read ones.
When configured as output, a read will return the latched output data.
Port bits 5 through 0 will read the last value written. A write will drive
associated pins only if configured for output and IIC is not enabled.
Port bits 5 through 0 do not have available external pins for
MC68HC912DT128A.
MC68HC912DT128A — Rev 4.0
MOTOROLA
Inter IC Bus
For More Information On This Product,
Go to: www.freescale.com
Technical Data
317