MC912DG128ACPVE Datasheet, PDF (120/478 Pages) Freescale Semiconductor, Inc – Upward compatible with M68HC11 instruction set

Flash Memory
Freescale Semiconductor, Inc.
Programming and erasing of Flash locations cannot be performed by
code being executed from the Flash memory. While these operations
must be performed in the order shown, other unrelated operations may
occur between the steps. Do not exceed t_FPGM maximum (40µs).
8.8 Programming the Flash EEPROM
Programming the Flash EEPROM is done on a row basis. A row consists
of 32 consecutive words (64 bytes) with rows starting from addresses
$XX00, $XX40, $XX80 and $XXC0. When writing a row care should be
taken not to write data to addresses outside of the row. Programming is
restricted to aligned word i.e. data writes to select rows/blocks for
programming/erase should be to even adresses and writes to any row
for programming should be to aligned words.
Use this step-by-step procedure to program a row of Flash memory.
1. Set the PGM bit. This configures the memory for program
operation and enables the latching of address and data for
programming.
2. Write to any aligned word Flash address within the row address
range desired (with any data) to select the row.
3. Wait for a time, t_NVS (min. 10µs).
4. Set the HVEN bit.
5. Wait for a time, t_PGS (min. 5µs).
6. Write one data word (two bytes) to the next aligned word Flash
address to be programmed. If BOOTP is asserted, an attempt to
program an address in the boot block will be ignored.
7. Wait for a time, t_FPGM (min. 30µs).
8. Repeat step 6 and 7 until all the words within the row are
programmed.
9. Clear the PGM bit.
10. Wait for a time, t_NVH (min. 5µs).
11. Clear the HVEN bit.
Technical Data
120
MC68HC912DT128A — Rev 4.0
Flash Memory
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