MC912DG128ACPVE Datasheet, PDF (118/478 Pages) Freescale Semiconductor, Inc – Upward compatible with M68HC11 instruction set

Flash Memory
Freescale Semiconductor, Inc.
BOOTP — Boot Protect
The boot blocks are located at $E000–$FFFF and $A000–$BFFF for
odd program pages for each Flash EEPROM module. Since boot
programs must be available at all times, the only useful boot block is
at $E000–$FFFF location. All paged boot blocks can be used as
protected program space if desired.
0 = Enable erase and program of 8K byte boot block
1 = Disable erase and program of 8K byte boot block
FEECTL — Flash EEPROM Control Register
$00F7
Bit 7
6
5
4
3
2
1
Bit 0
0
0
0
FEESWAI HVEN
0
ERAS
PGM
RESET:
0
0
0
0
0
0
0
0
This register controls the programming and erasure of the Flash
EEPROM.
FEESWAI — Flash EEPROM Stop in Wait Control
0 = Do not halt Flash EEPROM clock when the part is in wait
mode.
1 = Halt Flash EEPROM clock when the part is in wait mode.
HVEN — High-Voltage Enable
This bit enables the charge pump to supply high voltages for program
and erase operations in the array. HVEN can only be set if either PGM
or ERAS are set and the proper sequence for program or erase is
followed.
0 = Disables high voltage to array and charge pump off
1 = Enables high voltage to array and charge pump on
ERAS — Erase Control
This bit configures the memory for erase operation. ERAS is
interlocked with the PGM bit such that both bits cannot be equal to 1
or set to1 at the same time.
0 = Erase operation is not selected.
1 = Erase operation selected.
Technical Data
118
MC68HC912DT128A — Rev 4.0
Flash Memory
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