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F81867 Datasheet, PDF (8/315 Pages) Feature Integration Technology Inc. – 6 UARTs μSuper IO With 128 Bytes FIFO and Power Saving Functions
F81867
7.2.9
Multi Function Register Mapping For GPIO4x .............................................. 132
7.2.10 Multi Function Register Mapping For GPIO5x .............................................. 132
7.2.11 Multi Function Register Mapping For GPIO6x .............................................. 132
7.2.12 Multi Function Register Mapping For GPIO7x .............................................. 133
7.2.13 Multi Function Register Mapping For GPIO8x .............................................. 133
7.2.14 Multi Function Register Mapping For WDT................................................... 133
7.2.15 Multi Function Register Mapping For ERP, LED .......................................... 133
7.2.16 Multi Function Register Mapping For IR ....................................................... 134
7.2.17 Multi Function Register Mapping For I2C ..................................................... 134
7.2.18 Multi Function Register Mapping For UART 1 & UART 2 ............................. 135
7.2.19 Multi Function Register Mapping For UART 3 .............................................. 135
7.2.20 Multi Function Register Mapping For UART 4 .............................................. 135
7.2.21 Multi Function Register Mapping For UART 5 .............................................. 135
7.2.22 Multi Function Register Mapping For UART 6 .............................................. 136
7.3 FDC Registers (CR00) ......................................................................................................... 136
7.4 Parallel Port Registers (CR03) ............................................................................................. 138
7.5 Hardware Monitor Registers (CR04) .................................................................................... 140
7.6 KBC Registers (CR05) ......................................................................................................... 140
7.7 GPIO Registers (CR06) ....................................................................................................... 142
7.8 GPIO8x Scan Code Registers ............................................................................................. 169
7.9 WDT Registers (CR07) ........................................................................................................ 175
7.10 PME, ACPI and EUP Registers (LDN 0x0A) ........................................................................ 176
7.11 RTC RAM Registers (LDN 0x0B) ......................................................................................... 187
7.12 H2E Configuration Registers (LDN 0x0E) ............................................................................ 187
7.13 Debug Port Host Side Registers (LDN 0x0F)....................................................................... 188
7.14 UART1 Registers (CR10)..................................................................................................... 189
7.15 UART2 Registers (CR11) ..................................................................................................... 192
7.16 UART3 Registers (CR12)..................................................................................................... 195
7.17 UART4 Registers (CR13)..................................................................................................... 198
7.18 UART5 Registers (CR14)..................................................................................................... 201
7.19 UART6 Registers (CR15)..................................................................................................... 204
7.20 μC Side Registers ................................................................................................................ 207
7.20.1 Interrupt Control μC Side Register (Base Address 0x1000, 256 bytes) ........ 208
7.20.2 General Control μC Side Register (Base Address 0x1100, 256 bytes)......... 209
7.20.3 PWM Control μC Side Register (Base Address 0x1200, 256 bytes) ............ 212
7.20.4 μC Side SRAM1 Register (Base Address 0x1300, 256 bytes) ..................... 214
7.20.5 μC Side SRAM2 Register (Base Address 0x1400, 256 bytes) ..................... 214
Dec, 2011
V0.12P