F81867 Datasheet, PDF (184/315 Pages) Feature Integration Technology Inc. – 6 UARTs μSuper IO With 128 Bytes FIFO and Power Saving Functions

RI De-bounce Select Register ⎯ Index FEh
Bit
Name
R/W _Reset Default
Description
7-2
Reserved
-
-
- Reserved
Select RI# de-bounce time.
00: reserved.
1-0
RI_DB_SEL
R/W 5VSB
0 01: 200us.
10: 2ms.
11: 20ms.
F81867
ERP Enable Register ⎯ Index E0h
Bit
Name
R/W _Reset Default
Description
7
ERP_EN
R/W VBAT
0 : disable ERP function
0
1: enable ERP function
6
S3_BACK
R/W VBAT 0 ^{This bit will set “1” when system is back from S3 state.}
5-2
Reserved
-
-
- ^Reserved
RING1 PME event enable.
1
RING_PME_EN
R/W VBAT 0 0: disable RING1 PME event.
1: enable RING1 PME event, when RING1 falling edge detect
RING1 PWSOUT event enable.
0
RING_PWSOUT_EN R/W VBAT 0 0: disable RING1 PWSOUT event.
1: enable RING1 PWSOUT event, when RING1 falling edge detect
ERP Control Register 1 ⎯ Index E1h
Bit
Name
R/W _Reset Default
Description
7-6
Reserved
-
-
- ^Reserved
5 _{S3_ ERP_CTRL1#_DIS R/W VBAT}
4 _{S3 _ ERP_CTRL0#_DIS R/W VBAT}
3 _{S5 _ ERP_CTRL1#_DIS R/W VBAT}
2 _{S5 _ ERP_CTRL0#_DIS R/W VBAT}
1 _{AC_ ERP_CTRL1#_DIS R/W VBAT}
0 _{AC_ ERP_CTRL0#_DIS R/W VBAT}
0
If clear to “0” ERP_CTRL1# will output Low when S3 state. Else If set
to “1” ERP_CTRL1# will output High when S3 state.
0 ^{If clear to “0” ERP_CTRL0# will output Low when S3 state. Else If set}
to “1” ERP_CTRL0# will output High when S3 state.
If clear to “0” ERP_CTRL1# will output Low when S5 state. Else If set
1 _{to “1” ERP_CTRL1# will output High when S5 state.}
1
If clear to “0” ERP_CTRL0# will output Low when S5 state. Else If set
to “1” ERP_CTRL0# will output High when S5 state.
0
If clear to “0” ERP_CTRL1# will output Low when after AC lost. Else If
set to “1” ERP_CTRL1# will output High when after AC lost.
0 ^{If clear to “0” ERP_CTRL0# will output Low when after AC lost. Else If}
set to “1” ERP_CTRL0# will output High when after AC lost.
ERP Control Register 2 ⎯ Index E2h
Bit
Name
R/W _Reset Default
Description
7
AC_LOST
R 5VSB 1 This bit is AC lost status and writes 1 to this bit will clear it.
6
Reserved
R/W VBAT 0 Reserved
184
Dec, 2011
V0.12P