F81867 Datasheet, PDF (20/315 Pages) Feature Integration Technology Inc. – 6 UARTs μSuper IO With 128 Bytes FIFO and Power Saving Functions

F81867
backlight brightness control.
GPIO62
INDEX#
I/OOD_{12st, 5v}
IN_st,5v
General Purpose IO.
This Schmitt-triggered input from the disk drive is
active low when the head is positioned over the
beginning of a track marked by an index hole.
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CTS5#
IN_st,5v
3VCC Clear To Send is the modem control input.
PWM2 Output where its frequency range is
PWM 2
OOD₁₂
183Hz~46.875KHz. It can support various
applications such as manual fan control, and
backlight brightness control.
GPIO63
WPT#
I/OOD_{12st, 5v}
IN_st,5v
General Purpose IO.
Write protected. This active low Schmitt input from
the disk drive indicates that the diskette is
write-protected.
UART Data Terminal Ready. An active low signal
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DTR5#
O₁₂
3VCC informs the modem or data set that controller is ready
to communicate.
PWM 3
OOD₁₂
PWM3 Output where its frequency range is
183Hz~46.875KHz. It can support various
applications such as manual fan control, and
backlight brightness control.
GPIO64
I/OOD_{12st, 5v}
General Purpose IO.
Diskette change. This signal is active low at power on
DSKCHG#
IN_st,5v
and whenever the diskette is removed.
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3VCC
Data Set Ready. An active low signal indicates the
DSR5#
IN_st,5v
modem or data set is ready to establish a
communication link and transfer data to the UART.
5.5 Parallel Port (LPT Port)
Pin No.
102
103
Pin Name
FANIN3
SLCT
GPIO70
PE
FANCTL3
PWM _DAC3
Type
IN_st,5v
IN_st,5v
PWR
3VCC
I/OOD_{12st, 5v}
IN_st,5v
OOD_12,5v ^3VCC
AOUT
IN_st,5v
Description
Fan 3 tachometer input.
An active high input on this pin indicates that the
printer is selected. Refer to the description of the
parallel port for definition of this pin in ECP and EPP
mode.
General purpose IO.
An active high input on this pin indicates that the
printer has detected the end of the paper. Refer to
the description of the parallel port for the definition of
this pin in ECP and EPP mode.
Fan 3 control output. This pin provides PWM
duty-cycle output or a DAC voltage output.
Power on Strapping pin:
1: PWM mode.
0: Default is DAC mode for FANCTL3 (internal pull
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Dec, 2011
V0.12P