F81867 Datasheet, PDF (149/315 Pages) Feature Integration Technology Inc. – 6 UARTs μSuper IO With 128 Bytes FIFO and Power Saving Functions

GPIO0 Pulse Width Select 1 Register ⎯ Index F6h
Bit
Name
R/W Reset Default
7-6 GPIO03_PW_SEL R/W 5VSB
GPIO03 pulse width select:
00: 500us.
00b 01: 1ms.
10: 20ms.
11: 100ms.
5-4 GPIO02_PW_SEL R/w 5VSB
GPIO02 pulse width select:
00: 500us.
00b 01: 1ms.
10: 20ms.
11: 100ms.
3-2 GPIO01_PW_SEL R/W 5VSB
GPIO01 pulse width select:
00: 500us.
00b 01: 1ms.
10: 20ms.
11: 100ms.
1-0 GPIO00_PW_SEL R/W 5VSB
GPIO00 pulse width select:
00: 500us.
00b 01: 1ms.
10: 20ms.
11: 100ms.
Description
GPIO0 Pulse Width Select 2 Register ⎯ Index F7h
Bit
Name
R/W Reset Default
7-6 GPIO07_PW_SEL R/W 5VSB
GPIO07 pulse width select:
00: 500us.
00b 01: 1ms.
10: 20ms.
11: 100ms.
5-4 GPIO06_PW_SEL R/w 5VSB
GPIO06 pulse width select:
00: 500us.
00b 01: 1ms.
10: 20ms.
11: 100ms.
3-2 GPIO05_PW_SEL R/W 5VSB
GPIO05 pulse width select:
00: 500us.
00b 01: 1ms.
10: 20ms.
11: 100ms.
1-0 GPIO04_PW_SEL R/W 5VSB
GPIO04 pulse width select:
00: 500us.
00b 01: 1ms.
10: 20ms.
11: 100ms.
Description
F81867
149
Dec, 2011
V0.12P