F81867 Datasheet, PDF (279/315 Pages) Feature Integration Technology Inc. – 6 UARTs μSuper IO With 128 Bytes FIFO and Power Saving Functions

F81867
GPIO8 Make Code 4 Register ⎯ offset DCh
Bit
Name
R/W Reset Default
Description
7-0 GP_MAKE_CODE4 R/W 5VSB
This byte is used to assert make code when scan code event 4 occur. The
0
scan code events will set KBC OBF and put their make/break code into KBC
output buffer. The break code is make code + 0x80 and this function is
implemented by μC. The source of event is GPIO84.
GPIO8 Make Code 5 Register ⎯ offset DDh
Bit
Name
R/W Reset Default
Description
7-0 GP_MAKE_CODE5 R/W 5VSB
This byte is used to assert make code when scan code event 5 occur. The
0
scan code events will set KBC OBF and put their make/break code into KBC
output buffer. The break code is make code + 0x80 and this function is
implemented by μC. The source of event is GPIO85.
GPIO8 Make Code 6 Register ⎯ offset DEh
Bit
Name
R/W Reset Default
Description
7-0 GP_MAKE_CODE6 R/W 5VSB
This byte is used to assert make code when scan code event 6 occur. The
scan code events will set KBC OBF and put their make/break code into KBC
0 _{output buffer. The break code is make code + 0x80 and this function is}
implemented by μC. The source of event is GPIO86.
GPIO8 Make Code 7 Register ⎯ offset DFh
Bit
Name
R/W Reset Default
Description
7-0 GP_MAKE_CODE7 R/W 5VSB
This byte is used to assert make code when scan code event 7 occur. The
0
scan code events will set KBC OBF and put their make/break code into KBC
output buffer. The break code is make code + 0x80 and this function is
implemented by μC. The source of event is GPIO87.
GPIO8 Pre-Code 0 Register ⎯ offset C8h
Bit
Name
R/W Reset Default
Description
This byte is used to assert a pre-code before the make/break code when it is
7-0 GP_PRE_CODE0 R/W 5VSB 0xE0 _enabled.
GPIO8 Pre-Code 1 Register ⎯ offset C9h
Bit
Name
R/W Reset Default
Description
7-0
GP_PRE_CODE1 R/W 5VSB
0xE0
This byte is used to assert a pre-code before the make/break code when it is
enabled.
GPIO8 Pre-Code 2 Register ⎯ offset CAh
Bit
Name
R/W Reset Default
Description
This byte is used to assert a pre-code before the make/break code when it is
7-0 GP_PRE_CODE2 R/W 5VSB 0xE0 _enabled.
GPIO8 Pre-Code 3 Register ⎯ offset CBh
Bit
Name
R/W Reset Default
Description
7-0
GP_PRE_CODE3 R/W 5VSB
0xE0
This byte is used to assert a pre-code before the make/break code when it is
enabled.
279
Dec, 2011
V0.12P