F81867 Datasheet, PDF (140/315 Pages) Feature Integration Technology Inc. – 6 UARTs μSuper IO With 128 Bytes FIFO and Power Saving Functions

7.5 Hardware Monitor Registers (CR04)
“-“ Reserved or Tri-State
Register 0x[HEX]
Register Name
30
H/W Monitor Device Enable Register
60
Base Address High Register
61
Base Address Low Register
70
IRQ Channel Select Register
F81867
MSB
--
00
10
--
Default Value
----
0000
0101
- - 00
LSB
-1
10
01
00
Hardware Monitor Device Enable Register ⎯ Index 30h
Bit
Name
R/W Reset Default
Description
7-1
Reserved
-
-
- Reserved
0: disable Hardware Monitor.
0
HM_EN
R/W LRESET# 1
1: enable Hardware Monitor.
Base Address High Register ⎯ Index 60h
Bit
Name
R/W Reset Default
Description
7-0 BASE_ADDR_HI R/W LRESET# 02h The MSB of Hardware Monitor base address.
Base Address Low Register ⎯ Index 61h
Bit
Name
R/W Reset Default
Description
7-0 BASE_ADDR_LO R/W LRESET# 95h The LSB of Hardware Monitor base address.
IRQ Channel Select Register ⎯ Index 70h
Bit
Name
R/W Reset Default
Description
7-4
Reserved
-
-
- Reserved.
3-0
SELHMIRQ
R/W LRESET# 0000 Select the IRQ channel for Hardware Monitor.
7.6 KBC Registers (CR05)
“-“ Reserved or Tri-State
Register 0x[HEX]
Register Name
30
H/W Monitor Device Enable Register
60
Base Address High Register
61
Base Address Low Register
70
IRQ Channel Select Register
FE
PS/2 Swap Register
MSB
--
00
10
--
0-
Default Value
----
0000
0101
- - 00
- 000
LSB
-1
10
01
00
01
140
Dec, 2011
V0.12P