F81867 Datasheet, PDF (280/315 Pages) Feature Integration Technology Inc. – 6 UARTs μSuper IO With 128 Bytes FIFO and Power Saving Functions

F81867
GPIO8 Pre-Code 4 Register ⎯ offset CCh
Bit
Name
R/W Reset Default
Description
7-0 GP_PRE_CODE4 R/W 5VSB 0xE0 ^{This byte is used to assert a pre-code before the make/break code when it is}
enabled.
GPIO8 Pre-Code 5 Register ⎯ offset CDh
Bit
Name
R/W Reset Default
Description
7-0
GP_PRE_CODE5 R/W 5VSB
0xE0
This byte is used to assert a pre-code before the make/break code when it is
enabled.
GPIO8 Pre-Code 6 Register ⎯ offset CEh
Bit
Name
R/W Reset Default
Description
7-0 GP_PRE_CODE6 R/W 5VSB 0xE0 ^{This byte is used to assert a pre-code before the make/break code when it is}
enabled.
GPIO8 Pre-Code 7 Register ⎯ offset CFh
Bit
Name
R/W Reset Default
Description
7-0
GP_PRE_CODE7 R/W 5VSB
0xE0
This byte is used to assert a pre-code before the make/break code when it is
enabled.
GPIO8 Scan Code 0 Control Register ⎯ offset B8h
Bit
Name
R/W Reset Default
Description
7
GP0_CTRL_EN R/W 5VSB 0 Set “1” will assert a left “Ctrl” key code first when scan code event occurs.
6
GP0_ALT_EN R/W 5VSB 0 Set “1” will assert a left “Alt” key code first when scan code event occurs.
5 GP0_SHIFT_EN R/W 5VSB 0 Set “1” will assert a left “Shift” key code first when scan code event occurs.
Set “1” will assert a left pre-code first when scan code 0 event occurs. When
4
GP0_PRE_EN R/W 5VSB 0 multiple keys are enabled, the sequence is “Ctrl” Æ “Alt” Æ “Shift” Æ
Pre-code Æ Make/Break code.
3-2 GP0_DELAY_TIME R/W 5VSB
The delay time for repeat make code could be user defined. μC reads this
0 _{register to determine the delay time.}
0
GP0_REP_TIME R/W 5VSB
0
The repeat time for repeat make code could be user defined. μC reads this
register to determine the delay time.
GPIO8 Scan Code 1 Control Register ⎯ offset B9h
Bit
Name
R/W Reset Default
Description
7
GP1_CTRL_EN R/W 5VSB 0 Set “1” will assert a left “Ctrl” key code first when scan code event occurs.
6
GP1_ALT_EN R/W 5VSB 0 Set “1” will assert a left “Alt” key code first when scan code event occurs.
5 GP1_SHIFT_EN R/W 5VSB 0 Set “1” will assert a left “Shift” key code first when scan code event occurs.
Set “1” will assert a left pre-code first when scan code 0 event occurs. When
4
GP1_PRE_EN R/W 5VSB 0 multiple keys are enabled, the sequence is “Ctrl” Æ “Alt” Æ “Shift” Æ
Pre-code Æ Make/Break code.
3-2 GP1_DELAY_TIME R/W 5VSB
The delay time for repeat make code could be user defined. μC reads this
0 _{register to determine the delay time.}
0
GP1_REP_TIME R/W 5VSB
0
The repeat time for repeat make code could be user defined. μC reads this
register to determine the delay time.
280
Dec, 2011
V0.12P