F81867 Datasheet, PDF (124/315 Pages) Feature Integration Technology Inc. – 6 UARTs μSuper IO With 128 Bytes FIFO and Power Saving Functions

F81867
0: Disable SDA from pin 76.
1: Enable SDA from pin 76.
2
SDA3_PIN71_EN R/W 5VSB
0 _{There is only one slave in the current design, it is recommended to select only}
one pin for SDA. When multi pins are selected, the priority of these bits is
MO_I2C_EN > SDA_PIN71_EN > SDA_PIN68_EN.
0: Disable SDA from pin 68.
1: Enable SDA from pin 68.
1
SDA2_PIN68_EN R/W 5VSB
1 _{There is only one slave in the current design, it is recommended to select only}
one pin for SDA. When multi pins are selected, the priority of these bits is
MO_I2C_EN > SDA_PIN71_EN > SDA_PIN68_EN.
0: Disable SCL from pin 67.
1: Enable SCL from pin 67.
0
SCL2_PIN67_EN R/W 5VSB
1 _{There is only one slave in the current design, it is recommended to select only}
one pin for SCL. When multi pins are selected, the priority of these bits is
MO_I2C_EN > SCL_PIN76_EN > SCL_PIN67_EN.
7.1.1310Hz Clock Divisor High Byte ⎯ Index 29h (Available when CLK_ TUNE_PROG_EN = 1)
Bit
Name
R/W Reset Default
Description
7 FINE_TUNE_START W
-
Write “1” to start the fine tune mechanism. The hardware will start to count 10
- cycle internal 500KHz clock with 48MHz clock. The count will present in index
0x2A, 0x2B.
6-4
Reserved
-
-
- Reserved.
3-0
CLK10HZ_DIV R/W VBAT 4’h3 ^{The divisor of 10Hz clock. Internal 10Hz clock is used to generate WDT event.}
It is divided from 10KHz clock and could be fine tune by change its divisor.
7.1.1410Hz Clock Divisor Low Byte ⎯ Index 2Ah (Available when CLK_ TUNE_PROG_EN = 0)
Bit
Name
R/W Reset Default
Description
7 PWM3_LPT_PIN_EN R/W 5VSB
0: Disable PWM3 from Pin 110.
0
1: Enable PWM3 from Pin 110.
6 PWM2_LPT_PIN_EN R/W 5VSB
0: Disable PWM2 from Pin 109.
0
1: Enable PWM2 from Pin 109.
5 PWM1_LPT_PIN_EN R/W 5VSB
0: Disable PWM1 from Pin 108.
0
1: Enable PWM1 from Pin 108.
4 PWM0_LPT_PIN_EN R/W 5VSB
0: Disable PWM0 from Pin 107.
0
1: Enable PWM0 from Pin 107.
0: Disable PWM3 from Pin 20.
3
PWM3_PIN_EN R/W 5VSB 0
1: Enable PWM3 from Pin 20.
0: Disable PWM2 from Pin 19.
2
PWM2_PIN_EN R/W 5VSB 0
1: Enable PWM2 from Pin 19.
0: Disable PWM1 from Pin 18.
1
PWM1_PIN_EN R/W 5VSB 0
1: Enable PWM1 from Pin 18.
0: Disable PWM0 from Pin 17.
0
PWM0_PIN_EN R/W 5VSB 0
1: Enable PWM0 from Pin 17.
124
Dec, 2011
V0.12P