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F81867 Datasheet, PDF (60/315 Pages) Feature Integration Technology Inc. – 6 UARTs μSuper IO With 128 Bytes FIFO and Power Saving Functions
F81867
OVT and Alert Output Enable Register 1 ⎯ Index 66h
Bit
Name
R/W Reset Default
Description
7
Reserved
R/W -
0 Reserved
Enable temperature 2 alert event (asserted when temperature over high
6
EN_T2_ALERT R/W 5VSB 0
limit)
Enable temperature 1 alert event (asserted when temperature over high
5
EN_T1_ALERT R/W 5VSB 0
limit)
4
EN_T0_ALERT R/W 5VSB
0 Enable temperature 0 alert event (asserted when temperature over high
limit)
3
Reserved
R/W -
0 Reserved
2
EN_T2_OVT
R/W 5VSB 0 Enable over temperature (OVT) mechanism of temperature2.
1
EN_T1_OVT
R/W 5VSB 1 Enable over temperature (OVT) mechanism of temperature1.
0
EN_T0_OVT
R/W 5VSB 0 Enable over temperature (OVT) mechanism of temperature0.
Temperature Sensor Type Register ⎯ Index 6Bh
Bit
Name
R/W Reset Default
7-4
Reserved
RO
-
0 Reserved
Description
3
Reserved
RO
-
0 Reserved
2
T2_MODE
R/W 5VSB
1 0: TEMP2 is connected to a thermistor.
1: TEMP2 is connected to a BJT. (default)
1
T1_MODE
R/W 5VSB
1 0: TEMP1 is connected to a thermistor
1: TEMP1 is connected to a BJT.(default)
0
Reserved
R
-
0 Reserved
TEMP1 Limit Hystersis Select Register ⎯ Index 6Ch
Bit
Name
7-4 TEMP1_HYS
3-0 TEMP0_HYS
R/W Reset Default
Description
R/W 5VSB
Limit hysteresis. (0~15ºC)
4h
Temperature and below the (boundary – hysteresis).
R/W 5VSB
Limit hysteresis. (0~15ºC)
4h
Temperature and below the (boundary – hysteresis).
TEMP2 and TEMP3 Limit Hystersis Select Register ⎯ Index 6Dh
Bit
Name
R/W Reset Default
Description
7-4
Reserved
R
-
0 Reserved
3-0 TEMP2_HYS
R/W 5VSB
Limit hysteresis. (0~15ºC)
4h
Temperature and below the (boundary – hysteresis ).
60
Dec, 2011
V0.12P