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F81867 Datasheet, PDF (172/315 Pages) Feature Integration Technology Inc. – 6 UARTs μSuper IO With 128 Bytes FIFO and Power Saving Functions
F81867
GPIO8 Scan Code 0 Control Register ⎯ Index B8h
Bit
Name
R/W Reset Default
Description
7
GP0_CTRL_EN R/W 5VSB
0 Set “1” will assert a left “Ctrl” key code first when the scan code event is
occurred.
6
GP0_ALT_EN
R/W 5VSB
0
Set “1” will assert a left “Alt” key code first when the scan code event is
occurred.
Set “1” will assert a left “Shift” key code first when the scan code event is
5
GP0_SHIFT_EN R/W 5VSB
0 occurred.
Set “1” will assert a left pre-code first when scan code 0 event is occurred.
4
GP0_PRE_EN R/W 5VSB 0 When multiple keys are enabled, the sequence is “Ctrl” Æ “Alt” Æ “Shift” Æ
Pre-code Æ Make/Break code.
3-2 GP0_DELAY_TIME R/W 5VSB
The delay time for repeating the make code could be user defined. μC read
0 this register to determine the delay time.
0
GP0_REP_TIME R/W 5VSB
0
The repeat time for repeating the make code could be user defined. μC read
this register to determine the delay time.
GPIO8 Scan Code 1 Control Register ⎯ Index B9h
Bit
Name
R/W Reset Default
Description
7
GP1_CTRL_EN R/W 5VSB 0 Set “1” will assert a left “Ctrl” key code first when scan code event occurred.
6
GP1_ALT_EN R/W 5VSB 0 Set “1” will assert a left “Alt” key code first when scan code event occurred.
5 GP1_SHIFT_EN R/W 5VSB 0 Set “1” will assert a left “Shift” key code first when scan code event occurred.
Set “1” will assert a left pre-code first when scan code 0 event occurred.
4
GP1_PRE_EN R/W 5VSB 0 When multiple keys are enabled, the sequence is “Ctrl” Æ “Alt” Æ “Shift” Æ
Pre-code Æ Make/Break code.
3-2 GP1_DELAY_TIME R/W 5VSB
The delay time for repeating the make code could be user defined. μC read
0 this register to determine the delay time.
0
GP1_REP_TIME R/W 5VSB
0
The repeat time for repeating the make code could be user defined. μC read
this register to determine the delay time.
GPIO8 Scan Code 2 Control Register ⎯ Index BAh
Bit
Name
R/W Reset Default
Description
7
GP2_CTRL_EN R/W 5VSB 0 Set “1” will assert a left “Ctrl” key code first when scan code event occurred.
6
GP2_ALT_EN R/W 5VSB 0 Set “1” will assert a left “Alt” key code first when scan code event occurred.
5 GP2_SHIFT_EN R/W 5VSB 0 Set “1” will assert a left “Shift” key code first when scan code event occurred.
Set “1” will assert a left pre-code first when scan code 0 event occurred.
4
GP2_PRE_EN R/W 5VSB 0 When multiple keys are enabled, the sequence is “Ctrl” Æ “Alt” Æ “Shift” Æ
Pre-code Æ Make/Break code.
3-2 GP2_DELAY_TIME R/W 5VSB
The delay time for repeating the make code could be user defined. μC read
0 this register to determine the delay time.
0
GP2_REP_TIME R/W 5VSB
0
The repeat time for repeating the make code could be user defined. μC read
this register to determine the delay time.
GPIO8 Scan Code 3 Control Register ⎯ Index BBh
Bit
Name
R/W Reset Default
Description
7
GP3_CTRL_EN R/W 5VSB 0 Set “1” will assert a left “Ctrl” key code first when scan code event occurred.
6
GP3_ALT_EN R/W 5VSB 0 Set “1” will assert a left “Alt” key code first when scan code event occurred.
5 GP3_SHIFT_EN R/W 5VSB 0 Set “1” will assert a left “Shift” key code first when scan code event occurred.
172
Dec, 2011
V0.12P