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F81867 Datasheet, PDF (66/315 Pages) Feature Integration Technology Inc. – 6 UARTs μSuper IO With 128 Bytes FIFO and Power Saving Functions
39h
R/W
3Ah
R/W
VBAT
5VSB
F81867
VIN3 under-voltage limit (V3_UVV_LIMIT). The unit is 8mv
96
(This byte is powered by VBAT)
VIN1 OVP limit. The unit is 8mv (This byte is powered by
FF
VBAT)
6.4.2.5 Fan Control Setting
FAN PME# Enable Register ⎯ Index 90h
Bit
Name
R/W Reset Default
Description
7-3
Reserved
R
-
0 Reserved
A one enables the corresponding interrupt status bit for PME# interrupt
2
EN_FAN3_PME R/W 5VSB 0
Set this bit 1 to enable PME# function for Fan3.
A one enables the corresponding interrupt status bit for PME# interrupt.
1
EN_FAN2_PME R/W 5VSB 0
Set this bit 1 to enable PME# function for Fan2.
A one enables the corresponding interrupt status bit for PME# interrupt.
0
EN_FAN1_PME R/W 5VSB 0
Set this bit 1 to enable PME# function for Fan1.
FAN Interrupt Status Register ⎯ Index 91h
Bit
Name
R/W Reset Default
Description
7-3
Reserved
R-
0 Reserved
This bit is set when the fan3 count exceeds the count limit. Write 1 to
2
FAN3_STS
R/W 3VCC --
clear this bit, write 0 will be ignored.
This bit is set when the fan2 count exceeds the count limit. Write 1 to
1
FAN2_STS
R/W 3VCC --
clear this bit, write 0 will be ignored.
This bit is set when the fan1 count exceeds the count limit. Write 1 to
0
FAN1_STS
R/W 3VCC --
clear this bit, write 0 will be ignored.
FAN Real Time Status Register ⎯ Index 92h
Bit
Name
R/W Reset Default
Description
7-3
Reserved
--
-
0 Reserved
This bit set to high mean that fan3 count can’t meet the expected count
2
FAN3_EXC
R 3VCC -- over than SMI time (CR9F) or when duty not zero but fan stop over then 3
sec.
1
FAN2_EXC
R 3VCC
This bit set to high mean that fan2 count can’t meet expect count over
--
than SMI time (CR9F) or when duty not zero but fan stop over then 3 sec.
0
FAN1_EXC
R 3VCC
This bit set to high mean that fan1 count can’t meet expect count over
--
than SMI time (CR9F) or when duty not zero but fan stop over then 3 sec.
66
Dec, 2011
V0.12P