F81867 Datasheet, PDF (144/315 Pages) Feature Integration Technology Inc. – 6 UARTs μSuper IO With 128 Bytes FIFO and Power Saving Functions

0: GPIO5 IRQ is not sharing with other devices..
2 GP5_IRQ_SHARE R/W LRESET# 0
1: GPIO5 IRQ is sharing with other devices.
0: GPIO1 IRQ is not sharing with other devices.
1 GP1_IRQ_SHARE R/W LRESET# 0
1: GPIO1 IRQ is sharing with other devices.
0: GPIO0 IRQ is not sharing with other devices.
0 GP0_IRQ_SHARE R/W LRESET# 0
1: GPIO0 IRQ is sharing with other devices.
F81867
GPIO IRQ Sharing Mode Register 　 Index 7Fh
Bit
Name
R/W _Reset Default
Description
GPIO8 IRQ sharing mode:
00 : Sharing IRQ active low Level.
01 : Sharing IRQ active high edge.
7-6 GP8_IRQ_MODE R/W _LRESET# 0 10 : Sharing IRQ active high Level.
11 : Reserved.
This bit is effective when IRQ is sharing with other device
(GP8_IRQ_SHARE is “1”).
GPIO5 IRQ sharing mode:
00 : Sharing IRQ active low Level.
01 : Sharing IRQ active high edge.
5-4 GP5_IRQ_MODE R/W LRESET# 0 10 : Sharing IRQ active high Level.
11 : Reserved.
This bit is effective when IRQ is sharing with other device
(GP5_IRQ_SHARE is “1”).
GPIO1 IRQ sharing mode:
00 : Sharing IRQ active low Level.
01 : Sharing IRQ active high edge.
3-2 GP1_IRQ_MODE R/W LRESET# 0 10 : Sharing IRQ active high Level.
11 : Reserved.
This bit is effective when IRQ is sharing with other device
(GP1_IRQ_SHARE is “1”).
144
Dec, 2011
V0.12P