F81867 Datasheet, PDF (226/315 Pages) Feature Integration Technology Inc. – 6 UARTs μSuper IO With 128 Bytes FIFO and Power Saving Functions

F81867
PECI Master DATA4 Register ⎯ Offset 47h
Bit
Name
R/W Reset Default
Description
For GetDIB() , this byte represents “Device Info”
For GetTemp(), this byte represents the least significant byte of
7-0 PECI_DATA4 R/W 5VSB
0
temperature.
For RdIAMSR() and RdPkgConfig() , this byte is “Completion
Code”.
For WrPkgConfig(), this byte represents “DATA[7:0]”
PECI Master DATA5 Register ⎯ Offset 48h
Bit
Name
R/W Reset Default
Description
7-0 PECI_DATA5 R/W 5VSB
For GetDIB() , this byte represents “Revision Number”
For GetTemp(), this byte represents the most significant byte of
0
temperature.
For RdIAMSR() and RdPkgConfig() , this byte represents
“DATA[7:0]”
For WrPkgConfig(), this byte represents “DATA[15:8]”
PECI Master DATA6 Register ⎯ Offset 49h
Bit
Name
R/W Reset Default
Description
For RdIAMSR() and RdPkgConfig() , this byte represents
7-0 PECI_DATA6 R/W 5VSB
0 “DATA[15:8]”.
For WrPkgConfig(), this byte represents “DATA[23:16]”
PECI Master DATA7 Register ⎯ Offset 4Ah
Bit
Name
R/W Reset Default
Description
7-0 PECI_DATA7 R/W 5VSB
For RdIAMSR() and RdPkgConfig() , this byte represents
0 “DATA[23:16]”.
For WrPkgConfig(), this byte represents “DATA[31:24]”
PECI Master DATA8 Register ⎯ Offset 4Bh
Bit
Name
R/W Reset Default
Description
7-0 PECI_DATA8 R/W 5VSB
For RdIAMSR() and RdPkgConfig() , this byte represents
0 “DATA[31:24]”.
For WrPkgConfig(), this byte represents “AW FCS”
PECI Master DATA9 Register ⎯ Offset 4Ch
Bit
Name
R/W Reset Default
Description
7-0 PECI_DATA9 R/W 5VSB
0
For RdIAMSR(), this byte represents “DATA[39:32]”.
For WrPkgConfig(), this byte represents “Completion Code”
PECI Master DATA10 Register ⎯ Offset 4Dh
Bit
Name
R/W Reset Default
Description
7-0 PECI_DATA10 R/W 5VSB 0 For RdIAMSR(), this byte represents “DATA[47:40]”.
226
Dec, 2011
V0.12P