F81867 Datasheet, PDF (141/315 Pages) Feature Integration Technology Inc. – 6 UARTs μSuper IO With 128 Bytes FIFO and Power Saving Functions

KBC Device Enable Register ⎯ Index 30h
Bit
Name
R/W Reset Default
7-1
Reserved
-
-
- Reserved
0: disable KBC.
0
KBC_EN
R/W 3VCC 1
1: enable KBC.
Description
F81867
Base Address High Register ⎯ Index 60h
Bit
Name
R/W Reset Default
Description
The MSB of KBC command port address. The address of data port is
7-0 BASE_ADDR_HI R/W LRESET# 00h _{command port address + 4}
Base Address Low Register ⎯ Index 61h
Bit
Name
R/W Reset Default
Description
The LSB of KBC command port address. The address of data port is command
7-0 BASE_ADDR_LO R/W LRESET# 60h _{port address + 4.}
KB IRQ Channel Select Register ⎯ Index 70h
Bit
Name
R/W Reset Default
Description
7-4
Reserved
-
-
- Reserved.
3-0
SELKIRQ
R/W LRESET# 0h Select the IRQ channel for keyboard interrupt.
Mouse IRQ Channel Select Register ⎯ Index 72h
Bit
Name
R/W Reset Default
Description
7-4
Reserved
-
-
- Reserved.
3-0
SELMIRQ
R/W LRESET# 0h Select the IRQ channel for PS/2 mouse interrupt.
PS/2 Swap Register ⎯ Index FEh
Bit
Name
R/W Reset Default
Description
7-5
Reserved
-
-
- Reserved
Keyboard Mouse Swap.
0: Keyboard/Mouse is not swapped.
4
KB_MO_SWAP R/W VBAT 0 1: Keyboard/Mouse is swapped.
This bit could be programmed by user.
If AUTO_DET_EN is set, this bit is also updated by hardware.
3-0 KBC_TEST_BIT R/W VBAT 3h Fintek test mode bits.
141
Dec, 2011
V0.12P