F81867 Datasheet, PDF (265/315 Pages) Feature Integration Technology Inc. – 6 UARTs μSuper IO With 128 Bytes FIFO and Power Saving Functions

2
GPIO12_IN
R
-
- The pin status of SCL/GPIO12/IRTX
1
GPIO11_IN
R
-
- The pin status of GPIO11/LED_VCC.
0
GPIO10_IN
R
-
- The pin status of GPIO10/LED_VSB.
F81867
GPIO1 Drive Enable Register ⎯ offset E3h
Bit
Name
R/W Reset Default
Description
7 GPIO17_DRV_EN R/W 5VSB
0: GPIO17 is open drain in output mode.
0
1: GPIO17 is push pull in output mode.
6 GPIO16_DRV_EN R/W 5VSB
0: GPIO16 is open drain in output mode.
0
1: GPIO16 is push pull in output mode.
5 GPIO15_DRV_EN R/W 5VSB
0: GPIO15 is open drain in output mode.
0
1: GPIO15 is push pull in output mode.
4 GPIO14_DRV_EN R/W 5VSB
0: GPIO14 is open drain in output mode.
0
1: GPIO14 is push pull in output mode.
3 GPIO13_DRV_EN R/W 5VSB
0: GPIO13 is open drain in output mode.
0
1: GPIO13 is push pull in output mode.
2 GPIO12_DRV_EN R/W 5VSB
0: GPIO12 is open drain in output mode.
0
1: GPIO12 is push pull in output mode.
1 GPIO11_DRV_EN R/W VBAT
0: GPIO11 is open drain in output mode.
0 1: GPIO11 is push pull in output mode.
This bit is powered by VBAT.
0 GPIO10_DRV_EN R/W VBAT
0: GPIO10 is open drain in output mode.
0 1: GPIO10 is push pull in output mode.
This bit is powered by VBAT.
GPIO1 SMI Enable Register ⎯ offset E8h
Bit
Name
R/W Reset Default
Description
0: Disable SMI event.
7 GPIO17_SMI_EN R/W 5VSB 0
1: Enable SMI event via PME# or SIRQ if GPIO17_SMI_ST is set.
0: Disable SMI event.
6 GPIO16_SMI_EN R/W 5VSB 0
1: Enable SMI event via PME# or SIRQ if GPIO16_SMI_ST is set.
0: Disable SMI event.
5 GPIO15_SMI_EN R/W 5VSB 0
1: Enable SMI event via PME# or SIRQ if GPIO15_SMI_ST is set.
0: Disable SMI event.
4 GPIO14_SMI_EN R/W 5VSB 0
1: Enable SMI event via PME# or SIRQ if GPIO14_SMI_ST is set.
0: Disable SMI event.
3 GPIO13_SMI_EN R/W 5VSB 0
1: Enable SMI event via PME# or SIRQ if GPIO13_SMI_ST is set.
0: Disable SMI event.
2 GPIO12_SMI_EN R/W 5VSB 0
1: Enable SMI event via PME# or SIRQ if GPIO12_SMI_ST is set.
0: Disable SMI event.
1 GPIO11_SMI_EN R/W 5VSB 0
1: Enable SMI event via PME# or SIRQ if GPIO11_SMI_ST is set.
0: Disable SMI event.
0 GPIO10_SMI_EN R/W 5VSB 0
1: Enable SMI event via PME# or SIRQ if GPIO10_SMI_ST is set.
265
Dec, 2011
V0.12P