F81867 Datasheet, PDF (173/315 Pages) Feature Integration Technology Inc. – 6 UARTs μSuper IO With 128 Bytes FIFO and Power Saving Functions

4
GP3_PRE_EN R/W 5VSB
3-2 GP3_DELAY_TIME R/W 5VSB
0 GP3_REP_TIME R/W 5VSB
F81867
Set “1” will assert a left pre-code first when scan code 0 event occurred.
0 When multiple keys are enabled, the sequence is “Ctrl” Æ “Alt” Æ “Shift” Æ
Pre-code Æ Make/Break code.
0 ^{The delay time for repeating the make code could be user defined. μC read}
this register to determine the delay time.
0
The repeat time for repeating the make code could be user defined. μC read
this register to determine the delay time.
GPIO8 Scan Code 4 Control Register ⎯ Index BCh
Bit
Name
R/W Reset Default
Description
7
GP4_CTRL_EN R/W 5VSB 0 Set “1” will assert a left “Ctrl” key code first when scan code event occurred.
6
GP4_ALT_EN R/W 5VSB 0 Set “1” will assert a left “Alt” key code first when scan code event occurred.
5 GP4_SHIFT_EN R/W 5VSB 0 Set “1” will assert a left “Shift” key code first when scan code event occurred.
Set “1” will assert a left pre-code first when scan code 0 event occurred.
4
GP4_PRE_EN R/W 5VSB 0 When multiple keys are enabled, the sequence is “Ctrl” Æ “Alt” Æ “Shift” Æ
Pre-code Æ Make/Break code.
3-2 GP4_DELAY_TIME R/W 5VSB
0 ^{The delay time for repeating the make code could be user defined. μC read}
this register to determine the delay time.
0
GP4_REP_TIME R/W 5VSB
0
The repeat time for repeating the make code could be user defined. μC read
this register to determine the delay time.
GPIO8 Scan Code 5 Control Register ⎯ Index BDh
Bit
Name
R/W Reset Default
Description
7
GP5_CTRL_EN R/W 5VSB 0 Set “1” will assert a left “Ctrl” key code first when scan code event occurred.
6
GP5_ALT_EN R/W 5VSB 0 Set “1” will assert a left “Alt” key code first when scan code event occurred.
5 GP5_SHIFT_EN R/W 5VSB 0 Set “1” will assert a left “Shift” key code first when scan code event occurred.
Set “1” will assert a left pre-code first when scan code 0 event occurred.
4
GP5_PRE_EN R/W 5VSB 0 When multiple keys are enabled, the sequence is “Ctrl” Æ “Alt” Æ “Shift” Æ
Pre-code Æ Make/Break code.
3-2 GP5_DELAY_TIME R/W 5VSB
0 ^{The delay time for repeating the make code could be user defined. μC read}
this register to determine the delay time.
0
GP5_REP_TIME R/W 5VSB
0
The repeat time for repeating the make code could be user defined. μC read
this register to determine the delay time.
GPIO8 Scan Code 6 Control Register ⎯ Index BEh
Bit
Name
R/W Reset Default
Description
7
GP6_CTRL_EN R/W 5VSB 0 Set “1” will assert a left “Ctrl” key code first when scan code event occurred.
6
GP6_ALT_EN R/W 5VSB 0 Set “1” will assert a left “Alt” key code first when scan code event occurred.
5 GP6_SHIFT_EN R/W 5VSB 0 Set “1” will assert a left “Shift” key code first when scan code event occurred.
Set “1” will assert a left pre-code first when scan code 0 event occurred.
4
GP6_PRE_EN R/W 5VSB 0 When multiple keys are enabled, the sequence is “Ctrl” Æ “Alt” Æ “Shift” Æ
Pre-code Æ Make/Break code.
3-2 GP6_DELAY_TIME R/W 5VSB
0 ^{The delay time for repeating the make code could be user defined. μC read}
this register to determine the delay time.
0
GP6_REP_TIME R/W 5VSB
0
The repeat time for repeating the make code could be user defined. μC read
this register to determine the delay time.
173
Dec, 2011
V0.12P