F81867 Datasheet, PDF (129/315 Pages) Feature Integration Technology Inc. – 6 UARTs μSuper IO With 128 Bytes FIFO and Power Saving Functions

PIN18
PIN19
PIN20
PIN21
GPIO61/TRK0#/RI5#
GPIO62/INDEX#/CTS5#
GPIO63/WPT#/DTR5#
GPIO64/DSKCHG#/DSR5#
TRK0#
INDEX#
WPT#
DSKCHG#
F81867
7.2.2 Multi Function Register Mapping For Parallel Port (LPT)
PIN No.
PIN FULL NAME
PIN SELECT
CONFIGURE REGISTER
PIN102
FANIN3/SLCT
SLCT
GPIO70/PE/FANCTL3/PWM_D
PIN103
PE
AC3
PIN104
GPIO71/BUSY
BUSY
PIN105
GPIO72/ACK#
ACK#
PIN106
PIN107
PIN108
PIN109
GPIO73/SLIN#
GPIO74/INIT#
GPIO75/ERR#
GPIO76/AFD#
SLIN#
INIT#
ERR#
AFD#
INDEX 27H BIT3-2 = 00 AND BIT0 = 0
INDEX 28H BIT5 = 0
INDEX 2BH BIT1-0 = 00
PIN110
GPIO77/STB#
STB#
PIN111
GPIO80/PD0
PD0
PIN112
GPIO81/PD1
PD1
PIN113
GPIO82/PD2
PD2
PIN114
GPIO83/PD3
PD3
PIN115
GPIO84/PD4
PD4
PIN116
GPIO85/PD5
PD5
PIN117
GPIO86/PD6
PD6
PIN118
GPIO87/PD7
PD7
7.2.3 Multi Function Register Mapping For Hardware Monitor
PIN No.
PIN FULL NAME
PIN SELECT
CONFIGURE REGISTER
INDEX 27H BIT3-2 = 01 AND BIT0 = 0
PIN71
BEEP/GPIO16/SDA/CIRRX#
BEEP
INDEX 29H BIT2 = 0
INDEX 2CH BIT6 = 0
INDEX 27H BIT3-2 = 10 AND BIT0 = 0
PIN76
ALERT#/GPIO20/SCL/CIRRX#
ALERT#
INDEX 29H BIT3 = 0
INDEX 2CH BIT0 = 0
PIN102
FANIN3/SLCT
FANIN3
INDEX 27H BIT0 = 0
INDEX 2BH BIT1 = 1
129
Dec, 2011
V0.12P