F81867 Datasheet, PDF (292/315 Pages) Feature Integration Technology Inc. – 6 UARTs μSuper IO With 128 Bytes FIFO and Power Saving Functions

3-2 UART5_FUNC_SEL R/W 5VSB
1-0 UART6_FUNC_SEL R/W 5VSB
F81867
UART5 Function Select.
00: No UART5 pin.
01: Simple UART: only SIN5 and SOUT5 are available. Pin 57 will be
0 function as SOUT5 and Pin 58 will function as SIN5.
10: Simple UART with RTS#. In addition to simple UART, pin 59 will be
function as RTS5#.
11: Full UART: pin 57 ~ 59, 17 ~ 21 will be function as UART pins.
UART6 Function Select.
00: No UART6 pin.
01: Simple UART: only SIN6 and SOUT6 are available. Pin 10 will be
0 function as SOUT6 and Pin 11 will be function as SIN6.
10: Simple UART with RTS#. In addition to simple UART, pin 9 will be
function as RTS6#.
11: Full UART: pin 9 ~ 16 will be function as UART pins.
Multi-function Select 2 Register ⎯ offset 28h (Available when GPIO_PROG_SEL[0] = 1)
Bit
Name
R/W _Reset Default
Description
7
Reserved
-
-
- Reserved
6 μC_P32_PIN59_EN R/W 5VSB
0: Disable μC P32 from pin 59.
0
1: Enable μC P32 from pin59.
5 μC_P31_PIN57_EN R/W 5VSB
0: Disable μC P31 from pin 57.
0
1: Enable μC P31 from pin57.
4 μC_P30_PIN58_EN R/W 5VSB
0: Disable μC P30 from pin 58.
0
1: Enable μC P30 from pin58.
3-2
Reserved
-
-
- Reserved
0: Disable CIRRX# from pin76. The pin function is ALERT#/GPIO20/SCL.
1
CIR_PIN76_EN R/W VBAT
0
1: Enable CIRRX# from pin76.
0: Disable CIRRX# from pin71. The pin function is BEEP/GPIO16/SDA.
0
CIR_PIN71_EN R/W VBAT
0
1: Enable CIRRX# from pin71.
Multi Function Select 3 Register ⎯ offset 29h (Available when CLK_ TUNE_PROG_EN = 0)
Bit
Name
R/W Reset Default
Description
UART4 Function Select.
00: No UART4 pin. Pin 44 ~ 51 are all GPIOs.
7-6 UART4_FUNC_SEL R/W 5VSB
01: Simple UART: only SIN4 and SOUT4 are available. Pin 50 will be
0 function as SOUT4 and Pin 51 will be function as SIN4.
10: Simple UART with RTS#. In addition to the simple UART, pin 48 will be
function as RTS4#.
11: Full UART: pin 44 ~ 51 will be function as UART pins.
292
Dec, 2011
V0.12P