F81867 Datasheet, PDF (3/315 Pages) Feature Integration Technology Inc. – 6 UARTs μSuper IO With 128 Bytes FIFO and Power Saving Functions

Table of Content
F81867
1. General Description ...................................................................................................... 10
2. Features ....................................................................................................................... 10
3. Block Diagram .............................................................................................................. 15
4. Pin Configuration .......................................................................................................... 16
5. Pin Description ............................................................................................................. 17
5.1 Power Pin ............................................................................................................................... 17
5.2 Clock ...................................................................................................................................... 18
5.3 LPC Interface ......................................................................................................................... 18
5.4 FDC........................................................................................................................................ 18
5.5 Parallel Port (LPT Port) .......................................................................................................... 20
5.6 Hardware Monitor................................................................................................................... 22
5.7 KBC Function ......................................................................................................................... 23
5.8 ACPI, ERP ............................................................................................................................. 24
5.9 UART, SIR .............................................................................................................................. 26
6. Function Description ..................................................................................................... 29
6.1 Power on Strapping Option .................................................................................................... 29
6.2 FDC........................................................................................................................................ 29
6.3 Parallel Port............................................................................................................................ 30
6.4 Hardware Monitor................................................................................................................... 33
6.4.1
General Description........................................................................................ 33
6.4.2
Hardware Monitor Device Registers ............................................................... 46
6.4.2.1Configuration Setting ........................................................................................................... 46
6.4.2.2PECI/TSI/I2C Setting........................................................................................................... 47
TSI Or IBEX Control Register ⎯ Index 08h ................................................................................... 47
I2C Address Control Register ⎯ Index 09h.................................................................................... 47
PECI, TSI, IBEX, Beta Register ⎯ Index 0Ah ................................................................................ 48
CUP Socket Select Register ⎯ Index 0Bh ..................................................................................... 48
TCC Register ⎯ Index 0Ch............................................................................................................ 48
TSI Offset Register ⎯ Index 0Dh ................................................................................................... 49
Configuration Register ⎯ Index 0Fh .............................................................................................. 49
TSI Temperature 0 – Index E0h...................................................................................................... 49
TSI Temperature 1 – Index E1h...................................................................................................... 49
TSI Temperature 2 Low Byte – Index E2h ...................................................................................... 50
TSI Temperature 2 High Byte – Index E3h ..................................................................................... 50
Dec, 2011
V0.12P