F81867 Datasheet, PDF (168/315 Pages) Feature Integration Technology Inc. – 6 UARTs μSuper IO With 128 Bytes FIFO and Power Saving Functions

0: GPIO81 is open drain in output mode.
1 GPIO81_DRV_EN R/W LRESET# 0
1: GPIO81 is push pull in output mode.
0: GPIO80 is open drain in output mode.
0 GPIO80_DRV_EN R/W LRESET# 0
1: GPIO80 is push pull in output mode.
F81867
GPIO8 SMI Enable Register ⎯ Index 8Eh
Bit
Name
R/W Reset Default
Description
0: Disable SMI event.
7 GPIO87_SMI_EN R/W LRESET# 0
1: Enable SMI event via PME# or SIRQ if GPIO87_SMI_ST is set.
0: Disable SMI event.
6 GPIO86_SMI_EN R/W LRESET# 0
1: Enable SMI event via PME# or SIRQ if GPIO86_SMI_ST is set.
0: Disable SMI event.
5 GPIO85_SMI_EN R/W LRESET# 0
1: Enable SMI event via PME# or SIRQ if GPIO85_SMI_ST is set.
0: Disable SMI event.
4 GPIO84_SMI_EN R/W LRESET# 0
1: Enable SMI event via PME# or SIRQ if GPIO84_SMI_ST is set.
0: Disable SMI event.
3 GPIO83_SMI_EN R/W LRESET# 0
1: Enable SMI event via PME# or SIRQ if GPIO83_SMI_ST is set.
0: Disable SMI event.
2 GPIO82_SMI_EN R/W LRESET# 0
1: Enable SMI event via PME# or SIRQ if GPIO82_SMI_ST is set.
0: Disable SMI event.
1 GPIO81_SMI_EN R/W LRESET# 0
1: Enable SMI event via PME# or SIRQ if GPIO81_SMI_ST is set.
0: Disable SMI event.
0 GPIO80_SMI_EN R/W LRESET# 0
1: Enable SMI event via PME# or SIRQ if GPIO80_SMI_ST is set.
GPIO8 SMI Status Register ⎯ Index 8Fh
Bit
Name
R/W Reset Default
Description
0: No SMI event.
7 GPIO87_SMI_ST R/W LRESET# 0 1: A SMI event will set if GPIO87 input is changed.
This bit is available in input mode. Write “1” to this bit will clear the status.
0: No SMI event.
6 GPIO86_SMI_ST R/W LRESET# 0 1: A SMI event will set if GPIO86 input is changed.
This bit is available in input mode. Write “1” to this bit will clear the status.
0: No SMI event.
5 GPIO85_SMI_ST R/W LRESET# 0 1: A SMI event will set if GPIO85 input is changed.
This bit is available in input mode. Write “1” to this bit will clear the status.
0: No SMI event.
4 GPIO84_SMI_ST R/W LRESET# 0 1: A SMI event will set if GPIO84 input is changed.
This bit is available in input mode. Write “1” to this bit will clear the status.
0: No SMI event.
3 GPIO83_SMI_ST R/W LRESET# 0 1: A SMI event will set if GPIO83 input is changed.
This bit is available in input mode. Write “1” to this bit will clear the status.
0: No SMI event.
2 GPIO82_SMI_ST R/W LRESET# 0 1: A SMI event will set if GPIO82 input is changed.
This bit is available in input mode. Write “1” to this bit will clear the status.
168
Dec, 2011
V0.12P