F81867 Datasheet, PDF (297/315 Pages) Feature Integration Technology Inc. – 6 UARTs μSuper IO With 128 Bytes FIFO and Power Saving Functions

F81867
5
μC_P35_EN R/W VBAT 0 Set “1” to enable μC P3.5 (also function as μC T1) function from pin 14.
4
μC_P34_EN R/W VBAT 0 Set “1” to enable μC P3.4 (also function as μC T0) function from pin 13.
3
μC_P33_EN R/W VBAT 0 Set “1” to enable μC P3.3 (also function as μC INT1#) function from pin 12.
2
μC_P32_EN R/W VBAT 0 Set “1” to enable μC P3.2 (also function as μC INT0#) function from pin 9.
1
μC_P31_EN R/W VBAT 0 Set “1” to enable μC P3.1 (also function as μC TXD) function from pin 11.
0
μC_P30_EN R/W VBAT 0 Set “1” to enable μC P3.0 (also function as μC RXD) function from pin 10.
Wakeup Control Register ⎯ offset 2Dh
Bit
Name
R/W Reset Default
7-5
Reserved
R/W -
0 Reserved
Description
4
KEY_SEL_ADD R/W VBAT 0 This bit is added to add more wakeup key function.
0: disable keyboard/mouse wake up.
3
WAKEUP_EN R/W VBAT 1
1: enable keyboard/mouse wake up.
This registers select the keyboard wake up key. Accompanying with
KEY_SEL_ADD, there are eight wakeup keys:
KEY_SEL_ADD KEY_SEL
Wakeup Key
0
00
Ctrl + Esc
0
01
Ctrl + F1
2-1
KEY_SEL
R/W VBAT 00
0
10
0
11
Ctrl + Space
Any Key
1
00
Windows Wakeup
1
01
Windows Power
1
10
Ctrl + Alt + Space
1
11
Space
This register selects the mouse wake up key.
0
MO_SEL
R/W VBAT 0 0: Wake up by clicking.
1: Wake up by clicking and movement.
7.20.14 RAM μC Side Register (Base Address 0x2500, 8 bytes)
The 256 byte RAM is accessed by Base Address + RAM address.
297
Dec, 2011
V0.12P