F81867 Datasheet, PDF (281/315 Pages) Feature Integration Technology Inc. – 6 UARTs μSuper IO With 128 Bytes FIFO and Power Saving Functions

F81867
GPIO8 Scan Code 2 Control Register ⎯ offset BAh
Bit
Name
R/W Reset Default
Description
7
GP2_CTRL_EN R/W 5VSB 0 Set “1” will assert a left “Ctrl” key code first when scan code event occurs.
6
GP2_ALT_EN R/W 5VSB 0 Set “1” will assert a left “Alt” key code first when scan code event occurs.
5 GP2_SHIFT_EN R/W 5VSB 0 Set “1” will assert a left “Shift” key code first when scan code event occurs.
Set “1” will assert a left pre-code first when scan code 0 event occurs. When
4
GP2_PRE_EN R/W 5VSB 0 multiple keys are enabled, the sequence is “Ctrl” Æ “Alt” Æ “Shift” Æ
Pre-code Æ Make/Break code.
3-2 GP2_DELAY_TIME R/W 5VSB
The delay time for repeat make code could be user defined. μC reads this
0 _{register to determine the delay time.}
0
GP2_REP_TIME R/W 5VSB
0
The repeat time for repeat make code could be user defined. μC reads this
register to determine the delay time.
GPIO8 Scan Code 3 Control Register ⎯ offset BBh
Bit
Name
R/W Reset Default
Description
7
GP3_CTRL_EN R/W 5VSB 0 Set “1” will assert a left “Ctrl” key code first when scan code event occurs.
6
GP3_ALT_EN R/W 5VSB 0 Set “1” will assert a left “Alt” key code first when scan code event occurs.
5 GP3_SHIFT_EN R/W 5VSB 0 Set “1” will assert a left “Shift” key code first when scan code event occurs.
Set “1” will assert a left pre-code first when scan code 0 event occurs. When
4
GP3_PRE_EN R/W 5VSB 0 multiple keys are enabled, the sequence is “Ctrl” Æ “Alt” Æ “Shift” Æ
Pre-code Æ Make/Break code.
3-2 GP3_DELAY_TIME R/W 5VSB
The delay time for repeat make code could be user defined. μC reads this
0 _{register to determine the delay time.}
0
GP3_REP_TIME R/W 5VSB
0
The repeat time for repeat make code could be user defined. μC reads this
register to determine the delay time.
GPIO8 Scan Code 4 Control Register ⎯ offset BCh
Bit
Name
R/W Reset Default
Description
7
GP4_CTRL_EN R/W 5VSB 0 Set “1” will assert a left “Ctrl” key code first when scan code event occurs.
6
GP4_ALT_EN R/W 5VSB 0 Set “1” will assert a left “Alt” key code first when scan code event occurs.
5 GP4_SHIFT_EN R/W 5VSB 0 Set “1” will assert a left “Shift” key code first when scan code event occurs.
Set “1” will assert a left pre-code first when scan code 0 event occurs. When
4
GP4_PRE_EN R/W 5VSB 0 multiple keys are enabled, the sequence is “Ctrl” Æ “Alt” Æ “Shift” Æ
Pre-code Æ Make/Break code.
3-2 GP4_DELAY_TIME R/W 5VSB
The delay time for repeat make code could be user defined. μC reads this
0 _{register to determine the delay time.}
0
GP4_REP_TIME R/W 5VSB
0
The repeat time for repeat make code could be user defined. μC reads this
register to determine the delay time.
GPIO8 Scan Code 5 Control Register ⎯ offset BDh
Bit
Name
R/W Reset Default
Description
7
GP5_CTRL_EN R/W 5VSB 0 Set “1” will assert a left “Ctrl” key code first when scan code event occurs.
6
GP5_ALT_EN R/W 5VSB 0 Set “1” will assert a left “Alt” key code first when scan code event occurs.
5 GP5_SHIFT_EN R/W 5VSB 0 Set “1” will assert a left “Shift” key code first when scan code event occurs.
Set “1” will assert a left pre-code first when scan code 0 event occurs. When
4
GP5_PRE_EN R/W 5VSB 0 multiple keys are enabled, the sequence is “Ctrl” Æ “Alt” Æ “Shift” Æ
Pre-code Æ Make/Break code.
281
Dec, 2011
V0.12P