82434LX Datasheet, PDF (53/191 Pages) Intel Corporation – PCI, CACHE AND MEMORY CONTROLLER PCMC

82434LX 82434NX
PAM Reg
PAM0 3 0
PAM0 7 4
PAM1 3 0
PAM1 7 4
PAM2 3 0
PAM2 7 4
PAM3 3 0
PAM3 7 4
PAM4 3 0
PAM4 7 4
PAM5 3 0
PAM5 7 4
PAM6 3 0
PAM6 7 4
Table 4 PAM Registers and Associated Memory Segments
Attribute Bits
Memory Segment
Comments
Offset
R
CE
WE
RE
080000h – 09FFFFh 512K – 640K
59h
R
CE
WE
RE
0F0000h – 0FFFFFh BIOS Area
59h
R
CE
WE
RE
0C0000h – 0C3FFFh ISA Add-on BIOS 5Ah
R
CE
WE
RE
0C4000h – 0C7FFFh ISA Add-on BIOS 5Ah
R
CE
WE
RE
0C8000h – 0CBFFFh ISA Add-on BIOS 5Bh
R
CE
WE
RE
0CC000h – 0CFFFFh ISA Add-on BIOS 5Bh
R
CE
WE
RE
0D0000h – 0D3FFFh ISA Add-on BIOS 5Ch
R
CE
WE
RE
0D4000h – 0D7FFFh ISA Add-on BIOS 5Ch
R
CE
WE
RE
0D8000h – 0DBFFFh ISA Add-on BIOS 5Dh
R
CE
WE
RE
0DC000h – 0DFFFFh ISA Add-on BIOS 5Dh
R
CE
WE
RE
0E0000h – 0E3FFFh BIOS Extension 5Eh
R
CE
WE
RE
0E4000h – 0E7FFFh BIOS Extension 5Eh
R
CE
WE
RE
0E8000h – 0EBFFFh BIOS Extension 5Fh
R
CE
WE
RE
0EC000h – 0EFFFFh BIOS Extension 5Fh
DOS Application Area (00000h-9FFFh)
The 640-KByte DOS application area is split into two regions The first region is 0 – 512-KByte and the second
region is 512–640 KByte Read write and cacheability attributes are always enabled and are not programma-
ble for the 0–512 KByte region
Video Buffer Area (A0000h-BFFFFh)
This 128-KByte area is not controlled by attribute bits CPU-initiated cycles in this region are always forwarded
to PCI for termination This area is not cacheable
Expansion Area (C0000h-DFFFFh)
This 128-KByte area is divided into eight 16-KByte segments Each segment can be assigned one of four
Read Write states read-only write-only read write or disabled Memory that is disabled is not remapped
Cacheability status can also be specified for each segment
Extended System BIOS Area (E0000h-EFFFFh)
This 64-KByte area is divided into four 16-KByte segments Each segment can be assigned independent
cacheability read and write attributes Memory segments that are disabled are not remapped elsewhere
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