82434LX Datasheet, PDF (157/191 Pages) Intel Corporation – PCI, CACHE AND MEMORY CONTROLLER PCMC

82434LX 82434NX
9 5 3 SECOND LEVEL CACHE STANDARD SRAM TIMING 66 MHz (82434LX)
Symbol
Functional Operating Range (V_CC ^e 4 9V to 5 25V T_CASE ^e 0 C to ^a70 C)
Parameter
Min Max Fig
Notes
t20a
CAA 6 3 CAB 6 3 Propagation
Delay from A 6 3
0
8 5 77 0 pF
t20b
CAA 6 3 CAB 6 3 Valid Delay from
HCLKIN Rising
0
7 2 78 0 pF
t21a
COE 1 0 Falling Edge Valid Delay
0
9 78 0 pF
from HCLKIN Rising
t21b
COE 1 0 Rising Edge Valid Delay
from HCLKIN Rising
0
5 5 78 0 pF
t22a
CWE 7 0 CBS 7 0 Falling Edge
2
14 78 CPU burst or single write to
Valid Delay from HCLKIN Rising
second level cache 0 pF
t22b
CWE 7 0 CBS 7 0 Rising Edge
3
14 78 CPU burst or single write to
Valid Delay from HCLKIN Rising
second level cache 0 pF
t22c
CWE 7 0 CBS 7 0 Valid Delay
from HCLKIN Rising
1 4 7 7 78 Cache line Fill 0 pF
t22d
CWE 7 0 CBS 7 0 Low Pulse
Width
1 HCLK
84 0 pF
t22e
CWE 7 0 CBS 7 0 Driven High
-1
before CALE Driven High
85 Last write to second level cache
during cache line fill 0 pF
t22f
CAA 4 3 CAB 4 3 Valid before
15
CWE 7 0 Falling
85 CPU burst write to second level
cache 0 pF
t23
CALE Valid Delay from HCLKIN
Rising
0
7 5 78 0 pF
t24
CR W 1 0 Valid Delay from
HCLKIN Rising
1 5 7 6 78 0 pF
t25
CBS 1 0 Valid Delay from HCLKIN
1 0 12 0 78 0 pF
Rising Reads from Cache SRAMs
157